Commit 2e38b882 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'sh-pfc-for-v4.20-tag1' of... 

Merge tag 'sh-pfc-for-v4.20-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

pinctrl: sh-pfc: Updates for v4.20

  - Add SATA and audio pin groups on R-Car M3-N,
  - Add EtherAVB pin groups on RZ/G1C,
  - Add PWM and display (DU) pin groups on R-Car E3,
  - Add support for the new RZ/G2M (r8a774a1) SoC.
parents 27d91e80 2ed03c83

Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ Required Properties: 
    - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller.

    - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller.

    - "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller.

    - "renesas,pfc-r8a774a1": for R8A774A1 (RZ/G2M) compatible pin-controller.

    - "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller.

    - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller.

    - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller.

drivers/pinctrl/sh-pfc/Kconfig

+5 −0
Original line number Diff line number Diff line
@@ -49,6 +49,11 @@ config PINCTRL_PFC_R8A77470 
        depends on ARCH_R8A77470

        select PINCTRL_SH_PFC



config PINCTRL_PFC_R8A774A1

        def_bool y

        depends on ARCH_R8A774A1

        select PINCTRL_SH_PFC



config PINCTRL_PFC_R8A7778

	def_bool y

	depends on ARCH_R8A7778

drivers/pinctrl/sh-pfc/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7740) += pfc-r8a7740.o 
obj-$(CONFIG_PINCTRL_PFC_R8A7743)	+= pfc-r8a7791.o

obj-$(CONFIG_PINCTRL_PFC_R8A7745)	+= pfc-r8a7794.o

obj-$(CONFIG_PINCTRL_PFC_R8A77470)	+= pfc-r8a77470.o

obj-$(CONFIG_PINCTRL_PFC_R8A774A1)	+= pfc-r8a7796.o

obj-$(CONFIG_PINCTRL_PFC_R8A7778)	+= pfc-r8a7778.o

obj-$(CONFIG_PINCTRL_PFC_R8A7779)	+= pfc-r8a7779.o

obj-$(CONFIG_PINCTRL_PFC_R8A7790)	+= pfc-r8a7790.o

drivers/pinctrl/sh-pfc/core.c

+6 −0
Original line number Diff line number Diff line
@@ -509,6 +509,12 @@ static const struct of_device_id sh_pfc_of_table[] = { 
		.data = &r8a77470_pinmux_info,

	},

#endif

#ifdef CONFIG_PINCTRL_PFC_R8A774A1

	{

		.compatible = "renesas,pfc-r8a774a1",

		.data = &r8a774a1_pinmux_info,

	},

#endif

#ifdef CONFIG_PINCTRL_PFC_R8A7778

	{

		.compatible = "renesas,pfc-r8a7778",

drivers/pinctrl/sh-pfc/pfc-r8a77470.c

+133 −0
Original line number Diff line number Diff line
@@ -1093,6 +1093,110 @@ static const struct sh_pfc_pin pinmux_pins[] = { 
	PINMUX_GPIO_GP_ALL(),

};



/* - AVB -------------------------------------------------------------------- */

static const unsigned int avb_col_pins[] = {

	RCAR_GP_PIN(5, 18),

};

static const unsigned int avb_col_mux[] = {

	AVB_COL_MARK,

};

static const unsigned int avb_crs_pins[] = {

	RCAR_GP_PIN(5, 17),

};

static const unsigned int avb_crs_mux[] = {

	AVB_CRS_MARK,

};

static const unsigned int avb_link_pins[] = {

	RCAR_GP_PIN(5, 14),

};

static const unsigned int avb_link_mux[] = {

	AVB_LINK_MARK,

};

static const unsigned int avb_magic_pins[] = {

	RCAR_GP_PIN(5, 15),

};

static const unsigned int avb_magic_mux[] = {

	AVB_MAGIC_MARK,

};

static const unsigned int avb_phy_int_pins[] = {

	RCAR_GP_PIN(5, 16),

};

static const unsigned int avb_phy_int_mux[] = {

	AVB_PHY_INT_MARK,

};

static const unsigned int avb_mdio_pins[] = {

	RCAR_GP_PIN(5, 12), RCAR_GP_PIN(5, 13),

};

static const unsigned int avb_mdio_mux[] = {

	AVB_MDC_MARK, AVB_MDIO_MARK,

};

static const unsigned int avb_mii_tx_rx_pins[] = {

	RCAR_GP_PIN(3, 12), RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),

	RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 13),



	RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),

	RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 1),

	RCAR_GP_PIN(3, 10),

};

static const unsigned int avb_mii_tx_rx_mux[] = {

	AVB_TX_CLK_MARK, AVB_TXD0_MARK, AVB_TXD1_MARK, AVB_TXD2_MARK,

	AVB_TXD3_MARK, AVB_TX_EN_MARK,



	AVB_RX_CLK_MARK, AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,

	AVB_RXD3_MARK, AVB_RX_DV_MARK, AVB_RX_ER_MARK,

};

static const unsigned int avb_mii_tx_er_pins[] = {

	RCAR_GP_PIN(5, 23),

};

static const unsigned int avb_mii_tx_er_mux[] = {

	AVB_TX_ER_MARK,

};

static const unsigned int avb_gmii_tx_rx_pins[] = {

	RCAR_GP_PIN(4, 1), RCAR_GP_PIN(3, 11), RCAR_GP_PIN(3, 12),

	RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15), RCAR_GP_PIN(3, 16),

	RCAR_GP_PIN(3, 27), RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),

	RCAR_GP_PIN(4, 0), RCAR_GP_PIN(5, 22), RCAR_GP_PIN(3, 13),

	RCAR_GP_PIN(5, 23),



	RCAR_GP_PIN(3, 0), RCAR_GP_PIN(3, 2), RCAR_GP_PIN(3, 3),

	RCAR_GP_PIN(3, 4), RCAR_GP_PIN(3, 5), RCAR_GP_PIN(3, 6),

	RCAR_GP_PIN(3, 7), RCAR_GP_PIN(3, 8), RCAR_GP_PIN(3, 9),

	RCAR_GP_PIN(3, 1), RCAR_GP_PIN(3, 10),

};

static const unsigned int avb_gmii_tx_rx_mux[] = {

	AVB_GTX_CLK_MARK, AVB_GTXREFCLK_MARK, AVB_TX_CLK_MARK, AVB_TXD0_MARK,

	AVB_TXD1_MARK, AVB_TXD2_MARK, AVB_TXD3_MARK, AVB_TXD4_MARK,

	AVB_TXD5_MARK, AVB_TXD6_MARK, AVB_TXD7_MARK, AVB_TX_EN_MARK,

	AVB_TX_ER_MARK,



	AVB_RX_CLK_MARK, AVB_RXD0_MARK, AVB_RXD1_MARK, AVB_RXD2_MARK,

	AVB_RXD3_MARK, AVB_RXD4_MARK, AVB_RXD5_MARK, AVB_RXD6_MARK,

	AVB_RXD7_MARK, AVB_RX_DV_MARK, AVB_RX_ER_MARK,

};

static const unsigned int avb_avtp_match_a_pins[] = {

	RCAR_GP_PIN(1, 15),

};

static const unsigned int avb_avtp_match_a_mux[] = {

	AVB_AVTP_MATCH_A_MARK,

};

static const unsigned int avb_avtp_capture_a_pins[] = {

	RCAR_GP_PIN(1, 14),

};

static const unsigned int avb_avtp_capture_a_mux[] = {

	AVB_AVTP_CAPTURE_A_MARK,

};

static const unsigned int avb_avtp_match_b_pins[] = {

	RCAR_GP_PIN(5, 20),

};

static const unsigned int avb_avtp_match_b_mux[] = {

	AVB_AVTP_MATCH_B_MARK,

};

static const unsigned int avb_avtp_capture_b_pins[] = {

	RCAR_GP_PIN(5, 19),

};

static const unsigned int avb_avtp_capture_b_mux[] = {

	AVB_AVTP_CAPTURE_B_MARK,

};

/* - MMC -------------------------------------------------------------------- */

static const unsigned int mmc_data1_pins[] = {

	/* D0 */
@@ -1370,6 +1474,19 @@ static const unsigned int scif_clk_b_mux[] = { 
};



static const struct sh_pfc_pin_group pinmux_groups[] = {

	SH_PFC_PIN_GROUP(avb_col),

	SH_PFC_PIN_GROUP(avb_crs),

	SH_PFC_PIN_GROUP(avb_link),

	SH_PFC_PIN_GROUP(avb_magic),

	SH_PFC_PIN_GROUP(avb_phy_int),

	SH_PFC_PIN_GROUP(avb_mdio),

	SH_PFC_PIN_GROUP(avb_mii_tx_rx),

	SH_PFC_PIN_GROUP(avb_mii_tx_er),

	SH_PFC_PIN_GROUP(avb_gmii_tx_rx),

	SH_PFC_PIN_GROUP(avb_avtp_match_a),

	SH_PFC_PIN_GROUP(avb_avtp_capture_a),

	SH_PFC_PIN_GROUP(avb_avtp_match_b),

	SH_PFC_PIN_GROUP(avb_avtp_capture_b),

	SH_PFC_PIN_GROUP(mmc_data1),

	SH_PFC_PIN_GROUP(mmc_data4),

	SH_PFC_PIN_GROUP(mmc_data8),
@@ -1409,6 +1526,21 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { 
	SH_PFC_PIN_GROUP(scif_clk_b),

};



static const char * const avb_groups[] = {

	"avb_col",

	"avb_crs",

	"avb_link",

	"avb_magic",

	"avb_phy_int",

	"avb_mdio",

	"avb_mii_tx_rx",

	"avb_mii_tx_er",

	"avb_gmii_tx_rx",

	"avb_avtp_match_a",

	"avb_avtp_capture_a",

	"avb_avtp_match_b",

	"avb_avtp_capture_b",

};

static const char * const mmc_groups[] = {

	"mmc_data1",

	"mmc_data4",
@@ -1471,6 +1603,7 @@ static const char * const scif_clk_groups[] = { 
};



static const struct sh_pfc_function pinmux_functions[] = {

	SH_PFC_FUNCTION(avb),

	SH_PFC_FUNCTION(mmc),

	SH_PFC_FUNCTION(scif0),

	SH_PFC_FUNCTION(scif1),