Commit 2dce08ab authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'octeontx2-af-fixes' 



Sai Krishna says:

====================
octeontx2: Miscellaneous fixes

This patchset includes following fixes.

Patch #1 Fix for the race condition while updating APR table

Patch #2 Fix end bit position in NPC scan config

Patch #3 Fix depth of CAM, MEM table entries

Patch #4 Fix in increase the size of DMAC filter flows

Patch #5 Fix driver crash resulting from invalid interface type
information retrieved from firmware

Patch #6 Fix incorrect mask used while installing filters involving
fragmented packets

Patch #7 Fixes for NPC field hash extract w.r.t IPV6 hash reduction,
         IPV6 filed hash configuration.

Patch #8 Fix for NPC hardware parser configuration destination
         address hash, IPV6 endianness issues.

Patch #9 Fix for skipping mbox initialization for PFs disabled by firmware.

Patch #10 Fix disabling packet I/O in case of mailbox timeout.

Patch #11 Fix detaching LF resources in case of VF probe fail.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 9e08dcef 99ae1260

drivers/net/ethernet/marvell/octeontx2/af/cgx.c

+8 −0
Original line number Diff line number Diff line
@@ -1231,6 +1231,14 @@ static inline void link_status_user_format(u64 lstat, 
	linfo->an = FIELD_GET(RESP_LINKSTAT_AN, lstat);

	linfo->fec = FIELD_GET(RESP_LINKSTAT_FEC, lstat);

	linfo->lmac_type_id = FIELD_GET(RESP_LINKSTAT_LMAC_TYPE, lstat);



	if (linfo->lmac_type_id >= LMAC_MODE_MAX) {

		dev_err(&cgx->pdev->dev, "Unknown lmac_type_id %d reported by firmware on cgx port%d:%d",

			linfo->lmac_type_id, cgx->cgx_id, lmac_id);

		strncpy(linfo->lmac_type, "Unknown", LMACTYPE_STR_LEN - 1);

		return;

	}



	lmac_string = cgx_lmactype_string[linfo->lmac_type_id];

	strncpy(linfo->lmac_type, lmac_string, LMACTYPE_STR_LEN - 1);

}

drivers/net/ethernet/marvell/octeontx2/af/mbox.c

+4 −1
Original line number Diff line number Diff line
@@ -157,7 +157,7 @@ EXPORT_SYMBOL(otx2_mbox_init); 
 */

int otx2_mbox_regions_init(struct otx2_mbox *mbox, void **hwbase,

			   struct pci_dev *pdev, void *reg_base,

			   int direction, int ndevs)

			   int direction, int ndevs, unsigned long *pf_bmap)

{

	struct otx2_mbox_dev *mdev;

	int devid, err;
@@ -169,6 +169,9 @@ int otx2_mbox_regions_init(struct otx2_mbox *mbox, void **hwbase, 
	mbox->hwbase = hwbase[0];



	for (devid = 0; devid < ndevs; devid++) {

		if (!test_bit(devid, pf_bmap))

			continue;



		mdev = &mbox->dev[devid];

		mdev->mbase = hwbase[devid];

		mdev->hwbase = hwbase[devid];

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+13 −6
Original line number Diff line number Diff line
@@ -96,9 +96,10 @@ void otx2_mbox_destroy(struct otx2_mbox *mbox); 
int otx2_mbox_init(struct otx2_mbox *mbox, void __force *hwbase,

		   struct pci_dev *pdev, void __force *reg_base,

		   int direction, int ndevs);



int otx2_mbox_regions_init(struct otx2_mbox *mbox, void __force **hwbase,

			   struct pci_dev *pdev, void __force *reg_base,

			   int direction, int ndevs);

			   int direction, int ndevs, unsigned long *bmap);

void otx2_mbox_msg_send(struct otx2_mbox *mbox, int devid);

int otx2_mbox_wait_for_rsp(struct otx2_mbox *mbox, int devid);

int otx2_mbox_busy_poll_for_rsp(struct otx2_mbox *mbox, int devid);
@@ -245,9 +246,9 @@ M(NPC_MCAM_READ_BASE_RULE, 0x6011, npc_read_base_steer_rule, \ 
M(NPC_MCAM_GET_STATS, 0x6012, npc_mcam_entry_stats,                     \

				   npc_mcam_get_stats_req,              \

				   npc_mcam_get_stats_rsp)              \

M(NPC_GET_SECRET_KEY, 0x6013, npc_get_secret_key,                     \

				   npc_get_secret_key_req,              \

				   npc_get_secret_key_rsp)              \

M(NPC_GET_FIELD_HASH_INFO, 0x6013, npc_get_field_hash_info,                     \

				   npc_get_field_hash_info_req,              \

				   npc_get_field_hash_info_rsp)              \

M(NPC_GET_FIELD_STATUS, 0x6014, npc_get_field_status,                     \

				   npc_get_field_status_req,              \

				   npc_get_field_status_rsp)              \
@@ -1524,14 +1525,20 @@ struct npc_mcam_get_stats_rsp { 
	u8 stat_ena; /* enabled */

};



struct npc_get_secret_key_req {

struct npc_get_field_hash_info_req {

	struct mbox_msghdr hdr;

	u8 intf;

};



struct npc_get_secret_key_rsp {

struct npc_get_field_hash_info_rsp {

	struct mbox_msghdr hdr;

	u64 secret_key[3];

#define NPC_MAX_HASH 2

#define NPC_MAX_HASH_MASK 2

	/* NPC_AF_INTF(0..1)_HASH(0..1)_MASK(0..1) */

	u64 hash_mask[NPC_MAX_INTF][NPC_MAX_HASH][NPC_MAX_HASH_MASK];

	/* NPC_AF_INTF(0..1)_HASH(0..1)_RESULT_CTRL */

	u64 hash_ctrl[NPC_MAX_INTF][NPC_MAX_HASH];

};



enum ptp_op {

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

+40 −9
Original line number Diff line number Diff line
@@ -2282,7 +2282,7 @@ static inline void rvu_afvf_mbox_up_handler(struct work_struct *work) 
}



static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr,

				int num, int type)

				int num, int type, unsigned long *pf_bmap)

{

	struct rvu_hwinfo *hw = rvu->hw;

	int region;
@@ -2294,6 +2294,9 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr, 
	 */

	if (type == TYPE_AFVF) {

		for (region = 0; region < num; region++) {

			if (!test_bit(region, pf_bmap))

				continue;



			if (hw->cap.per_pf_mbox_regs) {

				bar4 = rvu_read64(rvu, BLKADDR_RVUM,

						  RVU_AF_PFX_BAR4_ADDR(0)) +
@@ -2315,6 +2318,9 @@ static int rvu_get_mbox_regions(struct rvu *rvu, void **mbox_addr, 
	 * RVU_AF_PF_BAR4_ADDR register.

	 */

	for (region = 0; region < num; region++) {

		if (!test_bit(region, pf_bmap))

			continue;



		if (hw->cap.per_pf_mbox_regs) {

			bar4 = rvu_read64(rvu, BLKADDR_RVUM,

					  RVU_AF_PFX_BAR4_ADDR(region));
@@ -2343,20 +2349,41 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, 
	int err = -EINVAL, i, dir, dir_up;

	void __iomem *reg_base;

	struct rvu_work *mwork;

	unsigned long *pf_bmap;

	void **mbox_regions;

	const char *name;

	u64 cfg;



	mbox_regions = kcalloc(num, sizeof(void *), GFP_KERNEL);

	if (!mbox_regions)

	pf_bmap = bitmap_zalloc(num, GFP_KERNEL);

	if (!pf_bmap)

		return -ENOMEM;



	/* RVU VFs */

	if (type == TYPE_AFVF)

		bitmap_set(pf_bmap, 0, num);



	if (type == TYPE_AFPF) {

		/* Mark enabled PFs in bitmap */

		for (i = 0; i < num; i++) {

			cfg = rvu_read64(rvu, BLKADDR_RVUM, RVU_PRIV_PFX_CFG(i));

			if (cfg & BIT_ULL(20))

				set_bit(i, pf_bmap);

		}

	}



	mbox_regions = kcalloc(num, sizeof(void *), GFP_KERNEL);

	if (!mbox_regions) {

		err = -ENOMEM;

		goto free_bitmap;

	}



	switch (type) {

	case TYPE_AFPF:

		name = "rvu_afpf_mailbox";

		dir = MBOX_DIR_AFPF;

		dir_up = MBOX_DIR_AFPF_UP;

		reg_base = rvu->afreg_base;

		err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF);

		err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFPF, pf_bmap);

		if (err)

			goto free_regions;

		break;
@@ -2365,7 +2392,7 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, 
		dir = MBOX_DIR_PFVF;

		dir_up = MBOX_DIR_PFVF_UP;

		reg_base = rvu->pfreg_base;

		err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF);

		err = rvu_get_mbox_regions(rvu, mbox_regions, num, TYPE_AFVF, pf_bmap);

		if (err)

			goto free_regions;

		break;
@@ -2396,16 +2423,19 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, 
	}



	err = otx2_mbox_regions_init(&mw->mbox, mbox_regions, rvu->pdev,

				     reg_base, dir, num);

				     reg_base, dir, num, pf_bmap);

	if (err)

		goto exit;



	err = otx2_mbox_regions_init(&mw->mbox_up, mbox_regions, rvu->pdev,

				     reg_base, dir_up, num);

				     reg_base, dir_up, num, pf_bmap);

	if (err)

		goto exit;



	for (i = 0; i < num; i++) {

		if (!test_bit(i, pf_bmap))

			continue;



		mwork = &mw->mbox_wrk[i];

		mwork->rvu = rvu;

		INIT_WORK(&mwork->work, mbox_handler);
@@ -2414,8 +2444,7 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, 
		mwork->rvu = rvu;

		INIT_WORK(&mwork->work, mbox_up_handler);

	}

	kfree(mbox_regions);

	return 0;

	goto free_regions;



exit:

	destroy_workqueue(mw->mbox_wq);
@@ -2424,6 +2453,8 @@ static int rvu_mbox_init(struct rvu *rvu, struct mbox_wq_info *mw, 
		iounmap((void __iomem *)mbox_regions[num]);

free_regions:

	kfree(mbox_regions);

free_bitmap:

	bitmap_free(pf_bmap);

	return err;

}

drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

+8 −5
Original line number Diff line number Diff line
@@ -60,13 +60,14 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc, 
			   u64 iova, u64 *lmt_addr)

{

	u64 pa, val, pf;

	int err;

	int err = 0;



	if (!iova) {

		dev_err(rvu->dev, "%s Requested Null address for transulation\n", __func__);

		return -EINVAL;

	}



	mutex_lock(&rvu->rsrc_lock);

	rvu_write64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_REQ, iova);

	pf = rvu_get_pf(pcifunc) & 0x1F;

	val = BIT_ULL(63) | BIT_ULL(14) | BIT_ULL(13) | pf << 8 |
@@ -76,12 +77,13 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc, 
	err = rvu_poll_reg(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS, BIT_ULL(0), false);

	if (err) {

		dev_err(rvu->dev, "%s LMTLINE iova transulation failed\n", __func__);

		return err;

		goto exit;

	}

	val = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_ADDR_RSP_STS);

	if (val & ~0x1ULL) {

		dev_err(rvu->dev, "%s LMTLINE iova transulation failed err:%llx\n", __func__, val);

		return -EIO;

		err = -EIO;

		goto exit;

	}

	/* PA[51:12] = RVU_AF_SMMU_TLN_FLIT0[57:18]

	 * PA[11:0] = IOVA[11:0]
@@ -89,8 +91,9 @@ static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc, 
	pa = rvu_read64(rvu, BLKADDR_RVUM, RVU_AF_SMMU_TLN_FLIT0) >> 18;

	pa &= GENMASK_ULL(39, 0);

	*lmt_addr = (pa << 12) | (iova  & 0xFFF);



	return 0;

exit:

	mutex_unlock(&rvu->rsrc_lock);

	return err;

}



static int rvu_update_lmtaddr(struct rvu *rvu, u16 pcifunc, u64 lmt_addr)