Commit 2cf0f6fe authored by Rasmus Villemoes's avatar Rasmus Villemoes Committed by Thierry Reding
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pwm: mxs: Add support for inverse polarity 



If I'm reading of_pwm_xlate_with_flags() right, existing device trees
that set #pwm-cells = 2 will continue to work.

Signed-off-by: default avatarRasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent ebbfb159

drivers/pwm/pwm-mxs.c

+10 −4
Original line number Diff line number Diff line
@@ -25,8 +25,11 @@ 
#define  PERIOD_PERIOD(p)	((p) & 0xffff)

#define  PERIOD_PERIOD_MAX	0x10000

#define  PERIOD_ACTIVE_HIGH	(3 << 16)

#define  PERIOD_ACTIVE_LOW	(2 << 16)

#define  PERIOD_INACTIVE_HIGH	(3 << 18)

#define  PERIOD_INACTIVE_LOW	(2 << 18)

#define  PERIOD_POLARITY_NORMAL	(PERIOD_ACTIVE_HIGH | PERIOD_INACTIVE_LOW)

#define  PERIOD_POLARITY_INVERSE	(PERIOD_ACTIVE_LOW | PERIOD_INACTIVE_HIGH)

#define  PERIOD_CDIV(div)	(((div) & 0x7) << 20)

#define  PERIOD_CDIV_MAX	8
@@ -50,9 +53,7 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 
	unsigned int period_cycles, duty_cycles;

	unsigned long rate;

	unsigned long long c;



	if (state->polarity != PWM_POLARITY_NORMAL)

		return -ENOTSUPP;

	unsigned int pol_bits;



	/*

	 * If the PWM channel is disabled, make sure to turn on the
@@ -91,9 +92,12 @@ static int mxs_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 
	 * only take effect at the beginning of a new period, avoiding

	 * glitches.

	 */



	pol_bits = state->polarity == PWM_POLARITY_NORMAL ?

		PERIOD_POLARITY_NORMAL : PERIOD_POLARITY_INVERSE;

	writel(duty_cycles << 16,

	       mxs->base + PWM_ACTIVE0 + pwm->hwpwm * 0x20);

	writel(PERIOD_PERIOD(period_cycles) | PERIOD_POLARITY_NORMAL | PERIOD_CDIV(div),

	writel(PERIOD_PERIOD(period_cycles) | pol_bits | PERIOD_CDIV(div),

	       mxs->base + PWM_PERIOD0 + pwm->hwpwm * 0x20);



	if (state->enabled) {
@@ -135,6 +139,8 @@ static int mxs_pwm_probe(struct platform_device *pdev) 


	mxs->chip.dev = &pdev->dev;

	mxs->chip.ops = &mxs_pwm_ops;

	mxs->chip.of_xlate = of_pwm_xlate_with_flags;

	mxs->chip.of_pwm_n_cells = 3;

	mxs->chip.base = -1;



	ret = of_property_read_u32(np, "fsl,pwm-number", &mxs->chip.npwm);