Commit 2ce0acf5 authored by Leilk Liu's avatar Leilk Liu Committed by Mark Brown
Browse files

spi: mediatek: replace *_time name 



This patch replaces *_time name in mtk_spi_prepare_transfer().

Signed-off-by: default avatarLeilk Liu <leilk.liu@mediatek.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 13da5a0b

drivers/spi/spi-mt65xx.c

+8 −12
Original line number Diff line number Diff line
@@ -238,8 +238,7 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool enable) 
static void mtk_spi_prepare_transfer(struct spi_master *master,

				     struct spi_transfer *xfer)

{

	u32 spi_clk_hz, div, high_time, low_time, holdtime,

	    setuptime, cs_idletime, reg_val = 0;

	u32 spi_clk_hz, div, sck_time, cs_time, reg_val = 0;

	struct mtk_spi *mdata = spi_master_get_devdata(master);



	spi_clk_hz = clk_get_rate(mdata->spi_clk);
@@ -248,21 +247,18 @@ static void mtk_spi_prepare_transfer(struct spi_master *master, 
	else

		div = 1;



	high_time = (div + 1) / 2;

	low_time = (div + 1) / 2;

	holdtime = (div + 1) / 2 * 2;

	setuptime = (div + 1) / 2 * 2;

	cs_idletime = (div + 1) / 2 * 2;

	sck_time = (div + 1) / 2;

	cs_time = sck_time * 2;



	reg_val |= (((high_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);

	reg_val |= (((low_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);

	reg_val |= (((holdtime - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);

	reg_val |= (((setuptime - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);

	reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_HIGH_OFFSET);

	reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);

	reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);

	reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_SETUP_OFFSET);

	writel(reg_val, mdata->base + SPI_CFG0_REG);



	reg_val = readl(mdata->base + SPI_CFG1_REG);

	reg_val &= ~SPI_CFG1_CS_IDLE_MASK;

	reg_val |= (((cs_idletime - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET);

	reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG1_CS_IDLE_OFFSET);

	writel(reg_val, mdata->base + SPI_CFG1_REG);

}