Commit 2c8f8c6c authored by Alexander Shishkin's avatar Alexander Shishkin Committed by Wang, Xiaolong
Browse files

intel_th: pci: Add Sapphire Rapids SOC support

mainline inclusion
from mainline-v6.10-rc1
commit 2e1da7efabe05cb0cf0b358883b2bc89080ed0eb
category: feature
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/IAMRIA
Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=2e1da7efabe05cb0cf0b358883b2bc89080ed0eb



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Add support for the Trace Hub in Sapphire Rapids SOC.

Intel-SIG: commit 2e1da7efabe0 intel_th: pci: Add Sapphire Rapids SOC support
Backport Intel Intel Trace Hub support for SPR and GNR.

Signed-off-by: default avatarAlexander Shishkin <alexander.shishkin@linux.intel.com>
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: stable@kernel.org
Link: https://lore.kernel.org/r/20240429130119.1518073-13-alexander.shishkin@linux.intel.com


Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
[ Xiaolong Wang: amend commit log ]
Signed-off-by: default avatarXiaolong Wang <xiaolong.wang@intel.com>
parent 6d89cef4
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Original line number Diff line number Diff line
@@ -309,6 +309,11 @@ static const struct pci_device_id intel_th_pci_id_table[] = {
		PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x3256),
		.driver_data = (kernel_ulong_t)&intel_th_2x,
	},
	{
		/* Sapphire Rapids SOC */
		PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x3456),
		.driver_data = (kernel_ulong_t)&intel_th_2x,
	},
	{
		/* Alder Lake CPU */
		PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x466f),