Commit 2c87f7a3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pwm/for-5.12-rc1' of... 

Merge tag 'pwm/for-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm

Pull pwm updates from Thierry Reding:
 "The ZTE ZX platform is being removed, so the PWM driver is no longer
  needed and removed as well.

  Other than that this contains a small set of fixes and cleanups across
  a couple of drivers"

* tag 'pwm/for-5.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
  pwm: lpc18xx-sct: remove unneeded semicolon
  pwm: iqs620a: Correct a stale state variable
  pwm: iqs620a: Fix overflow and optimize calculations
  pwm: rockchip: Enable clock before calling clk_get_rate()
  pwm: rockchip: Eliminate potential race condition when probing
  pwm: rockchip: Replace "bus clk" with "PWM clk"
  pwm: rockchip: rockchip_pwm_probe(): Remove superfluous clk_unprepare()
  pwm: rockchip: Enable APB clock during register access while probing
  pwm: Remove ZTE ZX driver
parents ffc17596 9a9dd7e4

Documentation/devicetree/bindings/pwm/pwm-zx.txt

deleted100644 → 0
+0 −22
Original line number Diff line number Diff line 
ZTE ZX PWM controller



Required properties:

 - compatible: Should be "zte,zx296718-pwm".

 - reg: Physical base address and length of the controller's registers.

 - clocks : The phandle and specifier referencing the controller's clocks.

 - clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller.  The

   PCLK is for register access, while WCLK is the reference clock for

   calculating period and duty cycles.

 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of

   the cells format.



Example:



	pwm: pwm@1439000 {

		compatible = "zte,zx296718-pwm";

		reg = <0x1439000 0x1000>;

		clocks = <&lsp1crm LSP1_PWM_PCLK>,

			 <&lsp1crm LSP1_PWM_WCLK>;

		clock-names = "pclk", "wclk";

		#pwm-cells = <3>;

	};

drivers/pwm/Kconfig

+0 −10
Original line number Diff line number Diff line
@@ -611,14 +611,4 @@ config PWM_VT8500 
	  To compile this driver as a module, choose M here: the module

	  will be called pwm-vt8500.



config PWM_ZX

	tristate "ZTE ZX PWM support"

	depends on ARCH_ZX || COMPILE_TEST

	depends on HAS_IOMEM

	help

	  Generic PWM framework driver for ZTE ZX family SoCs.



	  To compile this driver as a module, choose M here: the module

	  will be called pwm-zx.



endif

drivers/pwm/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -57,4 +57,3 @@ obj-$(CONFIG_PWM_TIEHRPWM) += pwm-tiehrpwm.o 
obj-$(CONFIG_PWM_TWL)		+= pwm-twl.o

obj-$(CONFIG_PWM_TWL_LED)	+= pwm-twl-led.o

obj-$(CONFIG_PWM_VT8500)	+= pwm-vt8500.o
 
obj-$(CONFIG_PWM_ZX)		+= pwm-zx.o

drivers/pwm/pwm-iqs620a.c

+41 −53
Original line number Diff line number Diff line
@@ -37,16 +37,34 @@ struct iqs620_pwm_private { 
	struct pwm_chip chip;

	struct notifier_block notifier;

	struct mutex lock;

	bool out_en;

	u8 duty_val;

	unsigned int duty_scale;

};



static int iqs620_pwm_init(struct iqs620_pwm_private *iqs620_pwm,

			   unsigned int duty_scale)

{

	struct iqs62x_core *iqs62x = iqs620_pwm->iqs62x;

	int ret;



	if (!duty_scale)

		return regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,

					  IQS620_PWR_SETTINGS_PWM_OUT, 0);



	ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,

			   duty_scale - 1);

	if (ret)

		return ret;



	return regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,

				  IQS620_PWR_SETTINGS_PWM_OUT, 0xff);

}



static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,

			    const struct pwm_state *state)

{

	struct iqs620_pwm_private *iqs620_pwm;

	struct iqs62x_core *iqs62x;

	u64 duty_scale;

	unsigned int duty_cycle;

	unsigned int duty_scale;

	int ret;



	if (state->polarity != PWM_POLARITY_NORMAL)
@@ -56,7 +74,6 @@ static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 
		return -EINVAL;



	iqs620_pwm = container_of(chip, struct iqs620_pwm_private, chip);

	iqs62x = iqs620_pwm->iqs62x;



	/*

	 * The duty cycle generated by the device is calculated as follows:
@@ -70,38 +87,18 @@ static int iqs620_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, 
	 * For lower duty cycles (e.g. 0), the PWM output is simply disabled to

	 * allow an external pull-down resistor to hold the GPIO3/LTX pin low.

	 */

	duty_scale = div_u64(state->duty_cycle * 256, IQS620_PWM_PERIOD_NS);



	mutex_lock(&iqs620_pwm->lock);



	if (!state->enabled || !duty_scale) {

		ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,

					 IQS620_PWR_SETTINGS_PWM_OUT, 0);

		if (ret)

			goto err_mutex;

	}



	if (duty_scale) {

		u8 duty_val = min_t(u64, duty_scale - 1, 0xff);

	duty_cycle = min_t(u64, state->duty_cycle, IQS620_PWM_PERIOD_NS);

	duty_scale = duty_cycle * 256 / IQS620_PWM_PERIOD_NS;



		ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,

				   duty_val);

		if (ret)

			goto err_mutex;

	if (!state->enabled)

		duty_scale = 0;



		iqs620_pwm->duty_val = duty_val;

	}



	if (state->enabled && duty_scale) {

		ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,

					 IQS620_PWR_SETTINGS_PWM_OUT, 0xff);

		if (ret)

			goto err_mutex;

	}

	mutex_lock(&iqs620_pwm->lock);



	iqs620_pwm->out_en = state->enabled;

	ret = iqs620_pwm_init(iqs620_pwm, duty_scale);

	if (!ret)

		iqs620_pwm->duty_scale = duty_scale;



err_mutex:

	mutex_unlock(&iqs620_pwm->lock);



	return ret;
@@ -119,12 +116,11 @@ static void iqs620_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, 
	/*

	 * Since the device cannot generate a 0% duty cycle, requests to do so

	 * cause subsequent calls to iqs620_pwm_get_state to report the output

	 * as disabled with duty cycle equal to that which was in use prior to

	 * the request. This is not ideal, but is the best compromise based on

	 * as disabled. This is not ideal, but is the best compromise based on

	 * the capabilities of the device.

	 */

	state->enabled = iqs620_pwm->out_en;

	state->duty_cycle = DIV_ROUND_UP((iqs620_pwm->duty_val + 1) *

	state->enabled = iqs620_pwm->duty_scale > 0;

	state->duty_cycle = DIV_ROUND_UP(iqs620_pwm->duty_scale *

					 IQS620_PWM_PERIOD_NS, 256);



	mutex_unlock(&iqs620_pwm->lock);
@@ -136,7 +132,6 @@ static int iqs620_pwm_notifier(struct notifier_block *notifier, 
			       unsigned long event_flags, void *context)

{

	struct iqs620_pwm_private *iqs620_pwm;

	struct iqs62x_core *iqs62x;

	int ret;



	if (!(event_flags & BIT(IQS62X_EVENT_SYS_RESET)))
@@ -144,7 +139,6 @@ static int iqs620_pwm_notifier(struct notifier_block *notifier, 


	iqs620_pwm = container_of(notifier, struct iqs620_pwm_private,

				  notifier);

	iqs62x = iqs620_pwm->iqs62x;



	mutex_lock(&iqs620_pwm->lock);
@@ -153,16 +147,8 @@ static int iqs620_pwm_notifier(struct notifier_block *notifier, 
	 * of a device reset, so nothing else is printed here unless there is

	 * an additional failure.

	 */

	ret = regmap_write(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE,

			   iqs620_pwm->duty_val);

	if (ret)

		goto err_mutex;



	ret = regmap_update_bits(iqs62x->regmap, IQS620_PWR_SETTINGS,

				 IQS620_PWR_SETTINGS_PWM_OUT,

				 iqs620_pwm->out_en ? 0xff : 0);

	ret = iqs620_pwm_init(iqs620_pwm, iqs620_pwm->duty_scale);



err_mutex:

	mutex_unlock(&iqs620_pwm->lock);



	if (ret) {
@@ -209,12 +195,14 @@ static int iqs620_pwm_probe(struct platform_device *pdev) 
	ret = regmap_read(iqs62x->regmap, IQS620_PWR_SETTINGS, &val);

	if (ret)

		return ret;

	iqs620_pwm->out_en = val & IQS620_PWR_SETTINGS_PWM_OUT;



	if (val & IQS620_PWR_SETTINGS_PWM_OUT) {

		ret = regmap_read(iqs62x->regmap, IQS620_PWM_DUTY_CYCLE, &val);

		if (ret)

			return ret;

	iqs620_pwm->duty_val = val;



		iqs620_pwm->duty_scale = val + 1;

	}



	iqs620_pwm->chip.dev = &pdev->dev;

	iqs620_pwm->chip.ops = &iqs620_pwm_ops;

drivers/pwm/pwm-lpc18xx-sct.c

+1 −1
Original line number Diff line number Diff line
@@ -289,7 +289,7 @@ static int lpc18xx_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) 
		dev_err(lpc18xx_pwm->dev,

			"maximum number of simultaneous channels reached\n");

		return -EBUSY;

	};

	}



	set_bit(event, &lpc18xx_pwm->event_map);

	lpc18xx_data->duty_event = event;