Unverified Commit 2bc3fc87 authored by Anup Patel's avatar Anup Patel Committed by Palmer Dabbelt
Browse files

RISC-V: Remove CLINT related code from timer and arch 



Right now the RISC-V timer driver is convoluted to support:
1. Linux RISC-V S-mode (with MMU) where it will use TIME CSR for
   clocksource and SBI timer calls for clockevent device.
2. Linux RISC-V M-mode (without MMU) where it will use CLINT MMIO
   counter register for clocksource and CLINT MMIO compare register
   for clockevent device.

We now have a separate CLINT timer driver which also provide CLINT
based IPI operations so let's remove CLINT MMIO related code from
arch/riscv directory and RISC-V timer driver.

Signed-off-by: default avatarAnup Patel <anup.patel@wdc.com>
Tested-by: default avatarEmil Renner Berhing <kernel@esmil.dk>
Acked-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: default avatarAtish Patra <atish.patra@wdc.com>
Reviewed-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: default avatarPalmer Dabbelt <palmerdabbelt@google.com>
parent 2ac6795f

arch/riscv/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -81,7 +81,7 @@ config RISCV 
	select PCI_DOMAINS_GENERIC if PCI

	select PCI_MSI if PCI

	select RISCV_INTC

	select RISCV_TIMER

	select RISCV_TIMER if RISCV_SBI

	select SPARSEMEM_STATIC if 32BIT

	select SPARSE_IRQ

	select SYSCTL_EXCEPTION_TRACE

arch/riscv/Kconfig.socs

+2 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ config SOC_SIFIVE 


config SOC_VIRT

	bool "QEMU Virt Machine"

	select CLINT_TIMER if RISCV_M_MODE

	select POWER_RESET

	select POWER_RESET_SYSCON

	select POWER_RESET_SYSCON_POWEROFF
@@ -24,6 +25,7 @@ config SOC_VIRT 
config SOC_KENDRYTE

	bool "Kendryte K210 SoC"

	depends on !MMU

	select CLINT_TIMER if RISCV_M_MODE

	select SERIAL_SIFIVE if TTY

	select SERIAL_SIFIVE_CONSOLE if TTY

	select SIFIVE_PLIC

arch/riscv/configs/nommu_virt_defconfig

+2 −5
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ CONFIG_EXPERT=y 
CONFIG_SLOB=y

# CONFIG_SLAB_MERGE_DEFAULT is not set

# CONFIG_MMU is not set

CONFIG_SOC_VIRT=y

CONFIG_MAXPHYSMEM_2GB=y

CONFIG_SMP=y

CONFIG_CMDLINE="root=/dev/vda rw earlycon=uart8250,mmio,0x10000000,115200n8 console=ttyS0"
@@ -49,7 +50,6 @@ CONFIG_VIRTIO_BLK=y 
# CONFIG_SERIO is not set

# CONFIG_LEGACY_PTYS is not set

# CONFIG_LDISC_AUTOLOAD is not set

# CONFIG_DEVMEM is not set

CONFIG_SERIAL_8250=y

# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set

CONFIG_SERIAL_8250_CONSOLE=y
@@ -57,16 +57,13 @@ CONFIG_SERIAL_8250_NR_UARTS=1 
CONFIG_SERIAL_8250_RUNTIME_UARTS=1

CONFIG_SERIAL_OF_PLATFORM=y

# CONFIG_HW_RANDOM is not set

# CONFIG_DEVMEM is not set

# CONFIG_HWMON is not set

# CONFIG_LCD_CLASS_DEVICE is not set

# CONFIG_BACKLIGHT_CLASS_DEVICE is not set

# CONFIG_VGA_CONSOLE is not set

# CONFIG_HID is not set

# CONFIG_USB_SUPPORT is not set

CONFIG_VIRTIO_MMIO=y

CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y

CONFIG_SIFIVE_PLIC=y

# CONFIG_VALIDATE_FS_PARSER is not set

CONFIG_EXT2_FS=y

# CONFIG_DNOTIFY is not set

# CONFIG_INOTIFY_USER is not set

arch/riscv/include/asm/clint.h

deleted100644 → 0
+0 −14
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0 */

#ifndef _ASM_RISCV_CLINT_H

#define _ASM_RISCV_CLINT_H 1



#include <linux/io.h>

#include <linux/smp.h>



#ifdef CONFIG_RISCV_M_MODE

void clint_init_boot_cpu(void);

#else /* CONFIG_RISCV_M_MODE */

#define clint_init_boot_cpu()	do { } while (0)

#endif /* CONFIG_RISCV_M_MODE */



#endif /* _ASM_RISCV_CLINT_H */

arch/riscv/include/asm/timex.h

+7 −21
Original line number Diff line number Diff line
@@ -7,41 +7,27 @@ 
#define _ASM_RISCV_TIMEX_H



#include <asm/csr.h>

#include <asm/mmio.h>



typedef unsigned long cycles_t;



extern u64 __iomem *riscv_time_val;

extern u64 __iomem *riscv_time_cmp;



#ifdef CONFIG_64BIT

#define mmio_get_cycles()	readq_relaxed(riscv_time_val)

#else

#define mmio_get_cycles()	readl_relaxed(riscv_time_val)

#define mmio_get_cycles_hi()	readl_relaxed(((u32 *)riscv_time_val) + 1)

#endif



static inline cycles_t get_cycles(void)

{

	if (IS_ENABLED(CONFIG_RISCV_SBI))

	return csr_read(CSR_TIME);

	return mmio_get_cycles();

}

#define get_cycles get_cycles



static inline u32 get_cycles_hi(void)

{

	return csr_read(CSR_TIMEH);

}

#define get_cycles_hi get_cycles_hi



#ifdef CONFIG_64BIT

static inline u64 get_cycles64(void)

{

	return get_cycles();

}

#else /* CONFIG_64BIT */

static inline u32 get_cycles_hi(void)

{

	if (IS_ENABLED(CONFIG_RISCV_SBI))

		return csr_read(CSR_TIMEH);

	return mmio_get_cycles_hi();

}



static inline u64 get_cycles64(void)

{

	u32 hi, lo;