Commit 2bb4ccbd authored by Leo Yan's avatar Leo Yan Committed by Arnaldo Carvalho de Melo
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tools headers UAPI: Update tools' copy of linux/coresight-pmu.h 



To get the changes in the commit:

  "coresight: etm-perf: Clarify comment on perf options".

Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
Reviewed-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Reviewed-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Link: https://lore.kernel.org/r/20210213113220.292229-2-leo.yan@linaro.org
Link: https://lore.kernel.org/r/20210224164835.3497311-3-mathieu.poirier@linaro.org


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 42b2b570

tools/include/linux/coresight-pmu.h

+12 −5
Original line number Original line Diff line number Diff line
@@ -10,7 +10,14 @@ 
#define CORESIGHT_ETM_PMU_NAME "cs_etm"

#define CORESIGHT_ETM_PMU_NAME "cs_etm"

#define CORESIGHT_ETM_PMU_SEED  0x10

#define CORESIGHT_ETM_PMU_SEED  0x10





/* ETMv3.5/PTM's ETMCR config bit */

/*

 * Below are the definition of bit offsets for perf option, and works as

 * arbitrary values for all ETM versions.

 *

 * Most of them are orignally from ETMv3.5/PTM's ETMCR config, therefore,

 * ETMv3.5/PTM doesn't define ETMCR config bits with prefix "ETM3_" and

 * directly use below macros as config bits.

 */

#define ETM_OPT_CYCACC		12

#define ETM_OPT_CYCACC		12

#define ETM_OPT_CTXTID		14

#define ETM_OPT_CTXTID		14

#define ETM_OPT_TS		28

#define ETM_OPT_TS		28