Commit 2ba4597d authored by Lokesh Vutla's avatar Lokesh Vutla Committed by Thierry Reding
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dt-bindings: pwm: pwm-tiehrpwm: Convert to json schema 



Convert the tiehrpwm binding to DT schema format using json-schema.
Along with this conversion the following changes are included:
- 'clock' and 'clock-names' properties are marked as required as
   driver fails to probe without these properties
- Dropped ti,am33xx-ehrpwm as it is no longer applicable.
- 'power-domains' property is introduced and marked as optional.

Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent 79dd354f

Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt

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TI SOC EHRPWM based PWM controller



Required properties:

- compatible: Must be "ti,<soc>-ehrpwm".

  for am33xx  - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";

  for am4372  - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";

  for am654   - compatible = "ti,am654-ehrpwm", "ti-am3352-ehrpwm";

  for da850   - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";

  for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";

- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of

  the cells format. The only third cell flag supported by this binding is

  PWM_POLARITY_INVERTED.

- reg: physical base address and size of the registers map.



Optional properties:

- clocks: Handle to the PWM's time-base and functional clock.

- clock-names: Must be set to "tbclk" and "fck".



Example:



ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */

	compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";

	#pwm-cells = <3>;

	reg = <0x48300200 0x100>;

	clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;

	clock-names = "tbclk", "fck";

};



ehrpwm0: pwm@48300200 { /* EHRPWM on am4372 */

	compatible = "ti,am4372-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";

	#pwm-cells = <3>;

	reg = <0x48300200 0x80>;

	clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;

	clock-names = "tbclk", "fck";

	ti,hwmods = "ehrpwm0";

};



ehrpwm0: pwm@1f00000 { /* EHRPWM on da850 */

	compatible = "ti,da850-ehrpwm", "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";

	#pwm-cells = <3>;

	reg = <0x1f00000 0x2000>;

};



ehrpwm0: pwm@4843e200 { /* EHRPWM on dra746 */

	compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm";

	#pwm-cells = <3>;

	reg = <0x4843e200 0x80>;

	clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>;

	clock-names = "tbclk", "fck";

};

Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pwm/pwm-tiehrpwm.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: TI SOC EHRPWM based PWM controller



maintainers:

  - Vignesh R <vigneshr@ti.com>



allOf:

  - $ref: pwm.yaml#



properties:

  compatible:

    oneOf:

      - const: ti,am3352-ehrpwm

      - items:

          - enum:

              - ti,da850-ehrpwm

              - ti,am4372-ehrpwm

              - ti,dra746-ehrpwm

              - ti,am654-ehrpwm

          - const: ti,am3352-ehrpwm



  reg:

    maxItems: 1



  "#pwm-cells":

    const: 3

    description: |

      See pwm.yaml in this directory for a description of the cells format.

      The only third cell flag supported by this binding is PWM_POLARITY_INVERTED.



  clock-names:

    items:

      - const: tbclk

      - const: fck



  clocks:

    maxItems: 2



  power-domains:

    maxItems: 1



required:

  - compatible

  - reg

  - "#pwm-cells"

  - clocks

  - clock-names



additionalProperties: false



examples:

  - |

    ehrpwm0: pwm@48300200 { /* EHRPWM on am33xx */

        compatible = "ti,am3352-ehrpwm";

        #pwm-cells = <3>;

        reg = <0x48300200 0x100>;

        clocks = <&ehrpwm0_tbclk>, <&l4ls_gclk>;

        clock-names = "tbclk", "fck";

    };