Unverified Commit 2b8a47e0 authored by Serge Semin's avatar Serge Semin Committed by Mark Brown
Browse files

spi: dw: Replace DWC_HSSI capability with IP-core version checker 



Since there is a common IP-core and component versions interface available
we can use it to differentiate the DW HSSI device features in the code.
Let's remove the corresponding DWC_HSSI capability flag then and use the
dw_spi_ip_is() macro instead.

Signed-off-by: default avatarSerge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: default avatarAndy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20211115181917.7521-7-Sergey.Semin@baikalelectronics.ru


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 2cc8d922

drivers/spi/spi-dw-core.c

+4 −4
Original line number Diff line number Diff line
@@ -272,7 +272,7 @@ static u32 dw_spi_prepare_cr0(struct dw_spi *dws, struct spi_device *spi) 
{

	u32 cr0 = 0;



	if (!(dws->caps & DW_SPI_CAP_DWC_HSSI)) {

	if (dw_spi_ip_is(dws, PSSI)) {

		/* CTRLR0[ 5: 4] Frame Format */

		cr0 |= FIELD_PREP(DW_PSSI_CTRLR0_FRF_MASK, DW_SPI_CTRLR0_FRF_MOTO_SPI);
@@ -325,7 +325,7 @@ void dw_spi_update_config(struct dw_spi *dws, struct spi_device *spi, 
	/* CTRLR0[ 4/3: 0] or CTRLR0[ 20: 16] Data Frame Size */

	cr0 |= (cfg->dfs - 1) << dws->dfs_offset;



	if (!(dws->caps & DW_SPI_CAP_DWC_HSSI))

	if (dw_spi_ip_is(dws, PSSI))

		/* CTRLR0[ 9:8] Transfer Mode */

		cr0 |= FIELD_PREP(DW_PSSI_CTRLR0_TMOD_MASK, cfg->tmode);

	else
@@ -832,7 +832,7 @@ static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws) 
		dws->ver = dw_readl(dws, DW_SPI_VERSION);



		dev_dbg(dev, "Synopsys DWC%sSSI v%c.%c%c\n",

			(dws->caps & DW_SPI_CAP_DWC_HSSI) ? " " : " APB ",

			dw_spi_ip_is(dws, PSSI) ? " APB " : " ",

			DW_SPI_GET_BYTE(dws->ver, 3), DW_SPI_GET_BYTE(dws->ver, 2),

			DW_SPI_GET_BYTE(dws->ver, 1));

	}
@@ -860,7 +860,7 @@ static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws) 
	 * writability. Note DWC SSI controller also has the extended DFS, but

	 * with zero offset.

	 */

	if (!(dws->caps & DW_SPI_CAP_DWC_HSSI)) {

	if (dw_spi_ip_is(dws, PSSI)) {

		u32 cr0, tmp = dw_readl(dws, DW_SPI_CTRLR0);



		dw_spi_enable_chip(dws, 0);

drivers/spi/spi-dw-mmio.c

+3 −2
Original line number Diff line number Diff line
@@ -207,7 +207,7 @@ static int dw_spi_pssi_init(struct platform_device *pdev, 
static int dw_spi_hssi_init(struct platform_device *pdev,

			    struct dw_spi_mmio *dwsmmio)

{

	dwsmmio->dws.caps = DW_SPI_CAP_DWC_HSSI;

	dwsmmio->dws.ip = DW_HSSI_ID;



	dw_spi_dma_setup_generic(&dwsmmio->dws);
@@ -217,7 +217,8 @@ static int dw_spi_hssi_init(struct platform_device *pdev, 
static int dw_spi_keembay_init(struct platform_device *pdev,

			       struct dw_spi_mmio *dwsmmio)

{

	dwsmmio->dws.caps = DW_SPI_CAP_KEEMBAY_MST | DW_SPI_CAP_DWC_HSSI;

	dwsmmio->dws.ip = DW_HSSI_ID;

	dwsmmio->dws.caps = DW_SPI_CAP_KEEMBAY_MST;



	return 0;

}

drivers/spi/spi-dw.h

+0 −1
Original line number Diff line number Diff line
@@ -32,7 +32,6 @@ 
/* DW SPI controller capabilities */

#define DW_SPI_CAP_CS_OVERRIDE		BIT(0)

#define DW_SPI_CAP_KEEMBAY_MST		BIT(1)

#define DW_SPI_CAP_DWC_HSSI		BIT(2)

#define DW_SPI_CAP_DFS32		BIT(3)



/* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */