Commit 2b87d769 authored Jan 14, 2025 by Stafford Horne Committed by Wentao Guan Apr 08, 2025

rseq/selftests: Fix riscv rseq_offset_deref_addv inline asm

stable inclusion
from stable-v6.6.81
commit d82826201ffe4f8eb0689dea32f3ef058852529c
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/IBYZED

Reference: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=d82826201ffe4f8eb0689dea32f3ef058852529c



--------------------------------

commit 713e788c0e07e185fd44dd581f74855ef149722f upstream.

When working on OpenRISC support for restartable sequences I noticed
and fixed these two issues with the riscv support bits.

 1 The 'inc' argument to RSEQ_ASM_OP_R_DEREF_ADDV was being implicitly
   passed to the macro.  Fix this by adding 'inc' to the list of macro
   arguments.
 2 The inline asm input constraints for 'inc' and 'off' use "er",  The
   riscv gcc port does not have an "e" constraint, this looks to be
   copied from the x86 port.  Fix this by just using an "r" constraint.

I have compile tested this only for riscv.  However, the same fixes I
use in the OpenRISC rseq selftests and everything passes with no issues.

Fixes: 171586a6 ("selftests/rseq: riscv: Template memory ordering and percpu access mode")
Signed-off-by: Stafford Horne <shorne@gmail.com>
Tested-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Acked-by: Shuah Khan <skhan@linuxfoundation.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20250114170721.3613280-1-shorne@gmail.com


Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
(cherry picked from commit d82826201ffe4f8eb0689dea32f3ef058852529c)
Signed-off-by: Wentao Guan <guanwentao@uniontech.com>

parent 8e569e2d

tools/testing/selftests/rseq/rseq-riscv-bits.h

+3 −3

Original line number	Diff line number	Diff line
		@@ -243,7 +243,7 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_offset_deref_addv)(intptr_t *ptr, off_t off, i
		#ifdef RSEQ_COMPARE_TWICE
		RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, "%l[error1]")
		#endif
		RSEQ_ASM_OP_R_DEREF_ADDV(ptr, off, 3)
		RSEQ_ASM_OP_R_DEREF_ADDV(ptr, off, inc, 3)
		RSEQ_INJECT_ASM(4)
		RSEQ_ASM_DEFINE_ABORT(4, abort)
		: /* gcc asm goto does not allow outputs */
		@@ -251,8 +251,8 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_offset_deref_addv)(intptr_t *ptr, off_t off, i
		[current_cpu_id] "m" (rseq_get_abi()->RSEQ_TEMPLATE_CPU_ID_FIELD),
		[rseq_cs] "m" (rseq_get_abi()->rseq_cs.arch.ptr),
		[ptr] "r" (ptr),
		[off] "er" (off),
		[inc] "er" (inc)
		[off] "r" (off),
		[inc] "r" (inc)
		RSEQ_INJECT_INPUT
		: "memory", RSEQ_ASM_TMP_REG_1
		RSEQ_INJECT_CLOBBER

tools/testing/selftests/rseq/rseq-riscv.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -158,7 +158,7 @@ do { \
		"bnez " RSEQ_ASM_TMP_REG_1 ", 222b\n" \
		"333:\n"

		#define RSEQ_ASM_OP_R_DEREF_ADDV(ptr, off, post_commit_label) \
		#define RSEQ_ASM_OP_R_DEREF_ADDV(ptr, off, inc, post_commit_label) \
		"mv " RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(ptr) "]\n" \
		RSEQ_ASM_OP_R_ADD(off) \
		REG_L RSEQ_ASM_TMP_REG_1 ", 0(" RSEQ_ASM_TMP_REG_1 ")\n" \