Merge tag 'mlx5-updates-2021-10-29' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux (2aec919f) · Commits · EulixOS / Software / Kernel

drivers/net/ethernet/mellanox/mlx5/core/Makefile

+1 −1

Original line number	Diff line number	Diff line
		@@ -45,7 +45,7 @@ mlx5_core-$(CONFIG_MLX5_CLS_ACT) += en_tc.o en/rep/tc.o en/rep/neigh.o \
		esw/indir_table.o en/tc_tun_encap.o \
		en/tc_tun_vxlan.o en/tc_tun_gre.o en/tc_tun_geneve.o \
		en/tc_tun_mplsoudp.o diag/en_tc_tracepoint.o \
		en/tc/post_act.o
		en/tc/post_act.o en/tc/int_port.o
		mlx5_core-$(CONFIG_MLX5_TC_CT) += en/tc_ct.o
		mlx5_core-$(CONFIG_MLX5_TC_SAMPLE) += en/tc/sample.o

drivers/net/ethernet/mellanox/mlx5/core/en/rep/tc.c

+92 −26

Original line number	Diff line number	Diff line
		@@ -19,10 +19,13 @@
		#include "en/tc_tun.h"
		#include "lib/port_tun.h"
		#include "en/tc/sample.h"
		#include "en_accel/ipsec_rxtx.h"
		#include "en/tc/int_port.h"

		struct mlx5e_rep_indr_block_priv {
		struct net_device *netdev;
		struct mlx5e_rep_priv *rpriv;
		enum flow_block_binder_type binder_type;

		struct list_head list;
		};
		@@ -297,14 +300,16 @@ int mlx5e_rep_tc_event_port_affinity(struct mlx5e_priv *priv)

		static struct mlx5e_rep_indr_block_priv *
		mlx5e_rep_indr_block_priv_lookup(struct mlx5e_rep_priv *rpriv,
		struct net_device *netdev)
		struct net_device *netdev,
		enum flow_block_binder_type binder_type)
		{
		struct mlx5e_rep_indr_block_priv *cb_priv;

		list_for_each_entry(cb_priv,
		&rpriv->uplink_priv.tc_indr_block_priv_list,
		list)
		if (cb_priv->netdev == netdev)
		if (cb_priv->netdev == netdev &&
		cb_priv->binder_type == binder_type)
		return cb_priv;

		return NULL;
		@@ -342,9 +347,13 @@ mlx5e_rep_indr_offload(struct net_device *netdev,
		static int mlx5e_rep_indr_setup_tc_cb(enum tc_setup_type type,
		void type_data, void indr_priv)
		{
		unsigned long flags = MLX5_TC_FLAG(EGRESS) \| MLX5_TC_FLAG(ESW_OFFLOAD);
		unsigned long flags = MLX5_TC_FLAG(ESW_OFFLOAD);
		struct mlx5e_rep_indr_block_priv *priv = indr_priv;

		flags \|= (priv->binder_type == FLOW_BLOCK_BINDER_TYPE_CLSACT_EGRESS) ?
		MLX5_TC_FLAG(EGRESS) :
		MLX5_TC_FLAG(INGRESS);

		switch (type) {
		case TC_SETUP_CLSFLOWER:
		return mlx5e_rep_indr_offload(priv->netdev, type_data, priv,
		@@ -426,11 +435,14 @@ mlx5e_rep_indr_setup_block(struct net_device netdev, struct Qdisc sch,
		void (cleanup)(struct flow_block_cb block_cb))
		{
		struct mlx5e_priv *priv = netdev_priv(rpriv->netdev);
		struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
		bool is_ovs_int_port = netif_is_ovs_master(netdev);
		struct mlx5e_rep_indr_block_priv *indr_priv;
		struct flow_block_cb *block_cb;

		if (!mlx5e_tc_tun_device_to_offload(priv, netdev) &&
		!(is_vlan_dev(netdev) && vlan_dev_real_dev(netdev) == rpriv->netdev)) {
		!(is_vlan_dev(netdev) && vlan_dev_real_dev(netdev) == rpriv->netdev) &&
		!is_ovs_int_port) {
		if (!(netif_is_macvlan(netdev) && macvlan_dev_real_dev(netdev) == rpriv->netdev))
		return -EOPNOTSUPP;
		if (!mlx5e_rep_macvlan_mode_supported(netdev)) {
		@@ -439,7 +451,14 @@ mlx5e_rep_indr_setup_block(struct net_device netdev, struct Qdisc sch,
		}
		}

		if (f->binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
		if (f->binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_INGRESS &&
		f->binder_type != FLOW_BLOCK_BINDER_TYPE_CLSACT_EGRESS)
		return -EOPNOTSUPP;

		if (f->binder_type == FLOW_BLOCK_BINDER_TYPE_CLSACT_EGRESS && !is_ovs_int_port)
		return -EOPNOTSUPP;

		if (is_ovs_int_port && !mlx5e_tc_int_port_supported(esw))
		return -EOPNOTSUPP;

		f->unlocked_driver_cb = true;
		@@ -447,7 +466,7 @@ mlx5e_rep_indr_setup_block(struct net_device netdev, struct Qdisc sch,

		switch (f->command) {
		case FLOW_BLOCK_BIND:
		indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev);
		indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev, f->binder_type);
		if (indr_priv)
		return -EEXIST;

		@@ -457,6 +476,7 @@ mlx5e_rep_indr_setup_block(struct net_device netdev, struct Qdisc sch,

		indr_priv->netdev = netdev;
		indr_priv->rpriv = rpriv;
		indr_priv->binder_type = f->binder_type;
		list_add(&indr_priv->list,
		&rpriv->uplink_priv.tc_indr_block_priv_list);

		@@ -474,7 +494,7 @@ mlx5e_rep_indr_setup_block(struct net_device netdev, struct Qdisc sch,

		return 0;
		case FLOW_BLOCK_UNBIND:
		indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev);
		indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev, f->binder_type);
		if (!indr_priv)
		return -ENOENT;

		@@ -611,8 +631,8 @@ static bool mlx5e_restore_tunnel(struct mlx5e_priv priv, struct sk_buff skb,
		return false;
		}

		/* Set tun_dev so we do dev_put() after datapath */
		tc_priv->tun_dev = dev;
		/* Set fwd_dev so we do dev_put() after datapath */
		tc_priv->fwd_dev = dev;

		skb->dev = dev;

		@@ -652,6 +672,12 @@ static bool mlx5e_restore_skb_chain(struct sk_buff *skb, u32 chain, u32 reg_c1,
		return mlx5e_restore_tunnel(priv, skb, tc_priv, tunnel_id);
		}

		static void mlx5_rep_tc_post_napi_receive(struct mlx5e_tc_update_priv *tc_priv)
		{
		if (tc_priv->fwd_dev)
		dev_put(tc_priv->fwd_dev);
		}

		static void mlx5e_restore_skb_sample(struct mlx5e_priv priv, struct sk_buff skb,
		struct mlx5_mapped_obj *mapped_obj,
		struct mlx5e_tc_update_priv *tc_priv)
		@@ -665,19 +691,50 @@ static void mlx5e_restore_skb_sample(struct mlx5e_priv priv, struct sk_buff sk
		mlx5_rep_tc_post_napi_receive(tc_priv);
		}

		bool mlx5e_rep_tc_update_skb(struct mlx5_cqe64 *cqe,
		struct sk_buff *skb,
		struct mlx5e_tc_update_priv *tc_priv)
		static bool mlx5e_restore_skb_int_port(struct mlx5e_priv priv, struct sk_buff skb,
		struct mlx5_mapped_obj *mapped_obj,
		struct mlx5e_tc_update_priv *tc_priv,
		bool *forward_tx,
		u32 reg_c1)
		{
		u32 tunnel_id = (reg_c1 >> ESW_TUN_OFFSET) & TUNNEL_ID_MASK;
		struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
		struct mlx5_rep_uplink_priv *uplink_priv;
		struct mlx5e_rep_priv *uplink_rpriv;

		/* Tunnel restore takes precedence over int port restore */
		if (tunnel_id)
		return mlx5e_restore_tunnel(priv, skb, tc_priv, tunnel_id);

		uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
		uplink_priv = &uplink_rpriv->uplink_priv;

		if (mlx5e_tc_int_port_dev_fwd(uplink_priv->int_port_priv, skb,
		mapped_obj->int_port_metadata, forward_tx)) {
		/* Set fwd_dev for future dev_put */
		tc_priv->fwd_dev = skb->dev;

		return true;
		}

		return false;
		}

		void mlx5e_rep_tc_receive(struct mlx5_cqe64 cqe, struct mlx5e_rq rq,
		struct sk_buff *skb)
		{
		u32 reg_c1 = be32_to_cpu(cqe->ft_metadata);
		struct mlx5e_tc_update_priv tc_priv = {};
		struct mlx5_mapped_obj mapped_obj;
		struct mlx5_eswitch *esw;
		bool forward_tx = false;
		struct mlx5e_priv *priv;
		u32 reg_c0;
		int err;

		reg_c0 = (be32_to_cpu(cqe->sop_drop_qpn) & MLX5E_TC_FLOW_ID_MASK);
		if (!reg_c0 \|\| reg_c0 == MLX5_FS_DEFAULT_FLOW_TAG)
		return true;
		goto forward;

		/* If reg_c0 is not equal to the default flow tag then skb->mark
		* is not supported and must be reset back to 0.
		@@ -691,26 +748,35 @@ bool mlx5e_rep_tc_update_skb(struct mlx5_cqe64 *cqe,
		netdev_dbg(priv->netdev,
		"Couldn't find mapped object for reg_c0: %d, err: %d\n",
		reg_c0, err);
		return false;
		goto free_skb;
		}

		if (mapped_obj.type == MLX5_MAPPED_OBJ_CHAIN) {
		u32 reg_c1 = be32_to_cpu(cqe->ft_metadata);

		return mlx5e_restore_skb_chain(skb, mapped_obj.chain, reg_c1, tc_priv);
		if (!mlx5e_restore_skb_chain(skb, mapped_obj.chain, reg_c1, &tc_priv) &&
		!mlx5_ipsec_is_rx_flow(cqe))
		goto free_skb;
		} else if (mapped_obj.type == MLX5_MAPPED_OBJ_SAMPLE) {
		mlx5e_restore_skb_sample(priv, skb, &mapped_obj, tc_priv);
		return false;
		mlx5e_restore_skb_sample(priv, skb, &mapped_obj, &tc_priv);
		goto free_skb;
		} else if (mapped_obj.type == MLX5_MAPPED_OBJ_INT_PORT_METADATA) {
		if (!mlx5e_restore_skb_int_port(priv, skb, &mapped_obj, &tc_priv,
		&forward_tx, reg_c1))
		goto free_skb;
		} else {
		netdev_dbg(priv->netdev, "Invalid mapped object type: %d\n", mapped_obj.type);
		return false;
		goto free_skb;
		}

		return true;
		}
		forward:
		if (forward_tx)
		dev_queue_xmit(skb);
		else
		napi_gro_receive(rq->cq.napi, skb);

		void mlx5_rep_tc_post_napi_receive(struct mlx5e_tc_update_priv *tc_priv)
		{
		if (tc_priv->tun_dev)
		dev_put(tc_priv->tun_dev);
		mlx5_rep_tc_post_napi_receive(&tc_priv);

		return;

		free_skb:
		dev_kfree_skb_any(skb);
		}

drivers/net/ethernet/mellanox/mlx5/core/en/rep/tc.h

+4 −10

Original line number	Diff line number	Diff line
		@@ -36,10 +36,8 @@ void mlx5e_rep_encap_entry_detach(struct mlx5e_priv *priv,
		int mlx5e_rep_setup_tc(struct net_device *dev, enum tc_setup_type type,
		void *type_data);

		bool mlx5e_rep_tc_update_skb(struct mlx5_cqe64 *cqe,
		struct sk_buff *skb,
		struct mlx5e_tc_update_priv *tc_priv);
		void mlx5_rep_tc_post_napi_receive(struct mlx5e_tc_update_priv *tc_priv);
		void mlx5e_rep_tc_receive(struct mlx5_cqe64 cqe, struct mlx5e_rq rq,
		struct sk_buff *skb);

		#else /* CONFIG_MLX5_CLS_ACT */

		@@ -66,13 +64,9 @@ static inline int
		mlx5e_rep_setup_tc(struct net_device *dev, enum tc_setup_type type,
		void *type_data) { return -EOPNOTSUPP; }

		struct mlx5e_tc_update_priv;
		static inline bool
		mlx5e_rep_tc_update_skb(struct mlx5_cqe64 *cqe,
		struct sk_buff *skb,
		struct mlx5e_tc_update_priv *tc_priv) { return true; }
		static inline void
		mlx5_rep_tc_post_napi_receive(struct mlx5e_tc_update_priv *tc_priv) {}
		mlx5e_rep_tc_receive(struct mlx5_cqe64 cqe, struct mlx5e_rq rq,
		struct sk_buff *skb) {}

		#endif /* CONFIG_MLX5_CLS_ACT */

drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.c

0 → 100644

+457 −0

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
		/* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */

		#include <linux/mlx5/fs.h>
		#include "en/mapping.h"
		#include "en/tc/int_port.h"
		#include "en.h"
		#include "en_rep.h"
		#include "en_tc.h"

		struct mlx5e_tc_int_port {
		enum mlx5e_tc_int_port_type type;
		int ifindex;
		u32 match_metadata;
		u32 mapping;
		struct list_head list;
		struct mlx5_flow_handle *rx_rule;
		refcount_t refcnt;
		struct rcu_head rcu_head;
		};

		struct mlx5e_tc_int_port_priv {
		struct mlx5_core_dev *dev;
		struct mutex int_ports_lock; /* Protects int ports list */
		struct list_head int_ports; /* Uses int_ports_lock */
		u16 num_ports;
		bool ul_rep_rx_ready; /* Set when uplink is performing teardown */
		struct mapping_ctx metadata_mapping; / Metadata for source port rewrite and matching */
		};

		bool mlx5e_tc_int_port_supported(const struct mlx5_eswitch *esw)
		{
		return mlx5_eswitch_vport_match_metadata_enabled(esw) &&
		MLX5_CAP_GEN(esw->dev, reg_c_preserve);
		}

		u32 mlx5e_tc_int_port_get_metadata(struct mlx5e_tc_int_port *int_port)
		{
		return int_port->match_metadata;
		}

		int mlx5e_tc_int_port_get_flow_source(struct mlx5e_tc_int_port *int_port)
		{
		/* For egress forwarding we can have the case
		* where the packet came from a vport and redirected
		* to int port or it came from the uplink, going
		* via internal port and hairpinned back to uplink
		* so we set the source to any port in this case.
		*/
		return int_port->type == MLX5E_TC_INT_PORT_EGRESS ?
		MLX5_FLOW_CONTEXT_FLOW_SOURCE_ANY_VPORT :
		MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK;
		}

		u32 mlx5e_tc_int_port_get_metadata_for_match(struct mlx5e_tc_int_port *int_port)
		{
		return int_port->match_metadata << (32 - ESW_SOURCE_PORT_METADATA_BITS);
		}

		static struct mlx5_flow_handle *
		mlx5e_int_port_create_rx_rule(struct mlx5_eswitch *esw,
		struct mlx5e_tc_int_port *int_port,
		struct mlx5_flow_destination *dest)

		{
		struct mlx5_flow_context *flow_context;
		struct mlx5_flow_act flow_act = {};
		struct mlx5_flow_handle *flow_rule;
		struct mlx5_flow_spec *spec;
		void *misc;

		spec = kvzalloc(sizeof(*spec), GFP_KERNEL);
		if (!spec)
		return ERR_PTR(-ENOMEM);

		misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters_2);
		MLX5_SET(fte_match_set_misc2, misc, metadata_reg_c_0,
		mlx5e_tc_int_port_get_metadata_for_match(int_port));

		misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters_2);
		MLX5_SET(fte_match_set_misc2, misc, metadata_reg_c_0,
		mlx5_eswitch_get_vport_metadata_mask());

		spec->match_criteria_enable = MLX5_MATCH_MISC_PARAMETERS_2;

		/* Overwrite flow tag with the int port metadata mapping
		* instead of the chain mapping.
		*/
		flow_context = &spec->flow_context;
		flow_context->flags \|= FLOW_CONTEXT_HAS_TAG;
		flow_context->flow_tag = int_port->mapping;
		flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
		flow_rule = mlx5_add_flow_rules(esw->offloads.ft_offloads, spec,
		&flow_act, dest, 1);
		if (IS_ERR(flow_rule))
		mlx5_core_warn(esw->dev, "ft offloads: Failed to add internal vport rx rule err %ld\n",
		PTR_ERR(flow_rule));

		kvfree(spec);

		return flow_rule;
		}

		static struct mlx5e_tc_int_port *
		mlx5e_int_port_lookup(struct mlx5e_tc_int_port_priv *priv,
		int ifindex,
		enum mlx5e_tc_int_port_type type)
		{
		struct mlx5e_tc_int_port *int_port;

		if (!priv->ul_rep_rx_ready)
		goto not_found;

		list_for_each_entry(int_port, &priv->int_ports, list)
		if (int_port->ifindex == ifindex && int_port->type == type) {
		refcount_inc(&int_port->refcnt);
		return int_port;
		}

		not_found:
		return NULL;
		}

		static int mlx5e_int_port_metadata_alloc(struct mlx5e_tc_int_port_priv *priv,
		int ifindex, enum mlx5e_tc_int_port_type type,
		u32 *id)
		{
		u32 mapped_key[2] = {type, ifindex};
		int err;

		err = mapping_add(priv->metadata_mapping, mapped_key, id);
		if (err)
		return err;

		/* Fill upper 4 bits of PFNUM with reserved value */
		*id \|= 0xf << ESW_VPORT_BITS;

		return 0;
		}

		static void mlx5e_int_port_metadata_free(struct mlx5e_tc_int_port_priv *priv,
		u32 id)
		{
		id &= (1 << ESW_VPORT_BITS) - 1;
		mapping_remove(priv->metadata_mapping, id);
		}

		/* Must be called with priv->int_ports_lock held */
		static struct mlx5e_tc_int_port *
		mlx5e_int_port_add(struct mlx5e_tc_int_port_priv *priv,
		int ifindex,
		enum mlx5e_tc_int_port_type type)
		{
		struct mlx5_eswitch *esw = priv->dev->priv.eswitch;
		struct mlx5_mapped_obj mapped_obj = {};
		struct mlx5e_rep_priv *uplink_rpriv;
		struct mlx5e_tc_int_port *int_port;
		struct mlx5_flow_destination dest;
		struct mapping_ctx *ctx;
		u32 match_metadata;
		u32 mapping;
		int err;

		if (priv->num_ports == MLX5E_TC_MAX_INT_PORT_NUM) {
		mlx5_core_dbg(priv->dev, "Cannot add a new int port, max supported %d",
		MLX5E_TC_MAX_INT_PORT_NUM);
		return ERR_PTR(-ENOSPC);
		}

		int_port = kzalloc(sizeof(*int_port), GFP_KERNEL);
		if (!int_port)
		return ERR_PTR(-ENOMEM);

		err = mlx5e_int_port_metadata_alloc(priv, ifindex, type, &match_metadata);
		if (err) {
		mlx5_core_warn(esw->dev, "Cannot add a new internal port, metadata allocation failed for ifindex %d",
		ifindex);
		goto err_metadata;
		}

		/* map metadata to reg_c0 object for miss handling */
		ctx = esw->offloads.reg_c0_obj_pool;
		mapped_obj.type = MLX5_MAPPED_OBJ_INT_PORT_METADATA;
		mapped_obj.int_port_metadata = match_metadata;
		err = mapping_add(ctx, &mapped_obj, &mapping);
		if (err)
		goto err_map;

		int_port->type = type;
		int_port->ifindex = ifindex;
		int_port->match_metadata = match_metadata;
		int_port->mapping = mapping;

		/* Create a match on internal vport metadata in vport table */
		uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);

		dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
		dest.ft = uplink_rpriv->root_ft;

		int_port->rx_rule = mlx5e_int_port_create_rx_rule(esw, int_port, &dest);
		if (IS_ERR(int_port->rx_rule)) {
		err = PTR_ERR(int_port->rx_rule);
		mlx5_core_warn(esw->dev, "Can't add internal port rx rule, err %d", err);
		goto err_rx_rule;
		}

		refcount_set(&int_port->refcnt, 1);
		list_add_rcu(&int_port->list, &priv->int_ports);
		priv->num_ports++;

		return int_port;

		err_rx_rule:
		mapping_remove(ctx, int_port->mapping);

		err_map:
		mlx5e_int_port_metadata_free(priv, match_metadata);

		err_metadata:
		kfree(int_port);

		return ERR_PTR(err);
		}

		/* Must be called with priv->int_ports_lock held */
		static void
		mlx5e_int_port_remove(struct mlx5e_tc_int_port_priv *priv,
		struct mlx5e_tc_int_port *int_port)
		{
		struct mlx5_eswitch *esw = priv->dev->priv.eswitch;
		struct mapping_ctx *ctx;

		ctx = esw->offloads.reg_c0_obj_pool;

		list_del_rcu(&int_port->list);

		/* The following parameters are not used by the
		* rcu readers of this int_port object so it is
		* safe to release them.
		*/
		if (int_port->rx_rule)
		mlx5_del_flow_rules(int_port->rx_rule);
		mapping_remove(ctx, int_port->mapping);
		mlx5e_int_port_metadata_free(priv, int_port->match_metadata);
		kfree_rcu(int_port);
		priv->num_ports--;
		}

		/* Must be called with rcu_read_lock held */
		static struct mlx5e_tc_int_port *
		mlx5e_int_port_get_from_metadata(struct mlx5e_tc_int_port_priv *priv,
		u32 metadata)
		{
		struct mlx5e_tc_int_port *int_port;

		list_for_each_entry_rcu(int_port, &priv->int_ports, list)
		if (int_port->match_metadata == metadata)
		return int_port;

		return NULL;
		}

		struct mlx5e_tc_int_port *
		mlx5e_tc_int_port_get(struct mlx5e_tc_int_port_priv *priv,
		int ifindex,
		enum mlx5e_tc_int_port_type type)
		{
		struct mlx5e_tc_int_port *int_port;

		if (!priv)
		return ERR_PTR(-EOPNOTSUPP);

		mutex_lock(&priv->int_ports_lock);

		/* Reject request if ul rep not ready */
		if (!priv->ul_rep_rx_ready) {
		int_port = ERR_PTR(-EOPNOTSUPP);
		goto done;
		}

		int_port = mlx5e_int_port_lookup(priv, ifindex, type);
		if (int_port)
		goto done;

		/* Alloc and add new int port to list */
		int_port = mlx5e_int_port_add(priv, ifindex, type);

		done:
		mutex_unlock(&priv->int_ports_lock);

		return int_port;
		}

		void
		mlx5e_tc_int_port_put(struct mlx5e_tc_int_port_priv *priv,
		struct mlx5e_tc_int_port *int_port)
		{
		if (!refcount_dec_and_mutex_lock(&int_port->refcnt, &priv->int_ports_lock))
		return;

		mlx5e_int_port_remove(priv, int_port);
		mutex_unlock(&priv->int_ports_lock);
		}

		struct mlx5e_tc_int_port_priv *
		mlx5e_tc_int_port_init(struct mlx5e_priv *priv)
		{
		struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
		struct mlx5e_tc_int_port_priv *int_port_priv;
		u64 mapping_id;

		if (!mlx5e_tc_int_port_supported(esw))
		return NULL;

		int_port_priv = kzalloc(sizeof(*int_port_priv), GFP_KERNEL);
		if (!int_port_priv)
		return NULL;

		mapping_id = mlx5_query_nic_system_image_guid(priv->mdev);

		int_port_priv->metadata_mapping = mapping_create_for_id(mapping_id, MAPPING_TYPE_INT_PORT,
		sizeof(u32) * 2,
		(1 << ESW_VPORT_BITS) - 1, true);
		if (IS_ERR(int_port_priv->metadata_mapping)) {
		mlx5_core_warn(priv->mdev, "Can't allocate metadata mapping of int port offload, err=%ld\n",
		PTR_ERR(int_port_priv->metadata_mapping));
		goto err_mapping;
		}

		int_port_priv->dev = priv->mdev;
		mutex_init(&int_port_priv->int_ports_lock);
		INIT_LIST_HEAD(&int_port_priv->int_ports);

		return int_port_priv;

		err_mapping:
		kfree(int_port_priv);

		return NULL;
		}

		void
		mlx5e_tc_int_port_cleanup(struct mlx5e_tc_int_port_priv *priv)
		{
		if (!priv)
		return;

		mutex_destroy(&priv->int_ports_lock);
		mapping_destroy(priv->metadata_mapping);
		kfree(priv);
		}

		/* Int port rx rules reside in ul rep rx tables.
		* It is possible the ul rep will go down while there are
		* still int port rules in its rx table so proper cleanup
		* is required to free resources.
		*/
		void mlx5e_tc_int_port_init_rep_rx(struct mlx5e_priv *priv)
		{
		struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
		struct mlx5_rep_uplink_priv *uplink_priv;
		struct mlx5e_tc_int_port_priv *ppriv;
		struct mlx5e_rep_priv *uplink_rpriv;

		uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
		uplink_priv = &uplink_rpriv->uplink_priv;

		ppriv = uplink_priv->int_port_priv;

		if (!ppriv)
		return;

		mutex_lock(&ppriv->int_ports_lock);
		ppriv->ul_rep_rx_ready = true;
		mutex_unlock(&ppriv->int_ports_lock);
		}

		void mlx5e_tc_int_port_cleanup_rep_rx(struct mlx5e_priv *priv)
		{
		struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
		struct mlx5_rep_uplink_priv *uplink_priv;
		struct mlx5e_tc_int_port_priv *ppriv;
		struct mlx5e_rep_priv *uplink_rpriv;
		struct mlx5e_tc_int_port *int_port;

		uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH);
		uplink_priv = &uplink_rpriv->uplink_priv;

		ppriv = uplink_priv->int_port_priv;

		if (!ppriv)
		return;

		mutex_lock(&ppriv->int_ports_lock);

		ppriv->ul_rep_rx_ready = false;

		list_for_each_entry(int_port, &ppriv->int_ports, list) {
		if (!IS_ERR_OR_NULL(int_port->rx_rule))
		mlx5_del_flow_rules(int_port->rx_rule);

		int_port->rx_rule = NULL;
		}

		mutex_unlock(&ppriv->int_ports_lock);
		}

		bool
		mlx5e_tc_int_port_dev_fwd(struct mlx5e_tc_int_port_priv *priv,
		struct sk_buff *skb, u32 int_vport_metadata,
		bool *forward_tx)
		{
		enum mlx5e_tc_int_port_type fwd_type;
		struct mlx5e_tc_int_port *int_port;
		struct net_device *dev;
		int ifindex;

		if (!priv)
		return false;

		rcu_read_lock();
		int_port = mlx5e_int_port_get_from_metadata(priv, int_vport_metadata);
		if (!int_port) {
		rcu_read_unlock();
		mlx5_core_dbg(priv->dev, "Unable to find int port with metadata 0x%.8x\n",
		int_vport_metadata);
		return false;
		}

		ifindex = int_port->ifindex;
		fwd_type = int_port->type;
		rcu_read_unlock();

		dev = dev_get_by_index(&init_net, ifindex);
		if (!dev) {
		mlx5_core_dbg(priv->dev,
		"Couldn't find internal port device with ifindex: %d\n",
		ifindex);
		return false;
		}

		skb->skb_iif = dev->ifindex;
		skb->dev = dev;

		if (fwd_type == MLX5E_TC_INT_PORT_INGRESS) {
		skb->pkt_type = PACKET_HOST;
		skb_set_redirected(skb, true);
		*forward_tx = false;
		} else {
		skb_reset_network_header(skb);
		skb_push_rcsum(skb, skb->mac_len);
		skb_set_redirected(skb, false);
		*forward_tx = true;
		}

		return true;
		}

drivers/net/ethernet/mellanox/mlx5/core/en/tc/int_port.h

0 → 100644

+65 −0

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
		/* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */

		#ifndef __MLX5_EN_TC_INT_PORT_H__
		#define __MLX5_EN_TC_INT_PORT_H__

		#include "en.h"

		struct mlx5e_tc_int_port;
		struct mlx5e_tc_int_port_priv;

		enum mlx5e_tc_int_port_type {
		MLX5E_TC_INT_PORT_INGRESS,
		MLX5E_TC_INT_PORT_EGRESS,
		};

		#if IS_ENABLED(CONFIG_MLX5_CLS_ACT)
		bool mlx5e_tc_int_port_supported(const struct mlx5_eswitch *esw);

		struct mlx5e_tc_int_port_priv *
		mlx5e_tc_int_port_init(struct mlx5e_priv *priv);
		void
		mlx5e_tc_int_port_cleanup(struct mlx5e_tc_int_port_priv *priv);

		void mlx5e_tc_int_port_init_rep_rx(struct mlx5e_priv *priv);
		void mlx5e_tc_int_port_cleanup_rep_rx(struct mlx5e_priv *priv);

		bool
		mlx5e_tc_int_port_dev_fwd(struct mlx5e_tc_int_port_priv *priv,
		struct sk_buff *skb, u32 int_vport_metadata,
		bool *forward_tx);
		struct mlx5e_tc_int_port *
		mlx5e_tc_int_port_get(struct mlx5e_tc_int_port_priv *priv,
		int ifindex,
		enum mlx5e_tc_int_port_type type);
		void
		mlx5e_tc_int_port_put(struct mlx5e_tc_int_port_priv *priv,
		struct mlx5e_tc_int_port *int_port);

		u32 mlx5e_tc_int_port_get_metadata(struct mlx5e_tc_int_port *int_port);
		u32 mlx5e_tc_int_port_get_metadata_for_match(struct mlx5e_tc_int_port *int_port);
		int mlx5e_tc_int_port_get_flow_source(struct mlx5e_tc_int_port *int_port);
		#else /* CONFIG_MLX5_CLS_ACT */
		static inline u32
		mlx5e_tc_int_port_get_metadata_for_match(struct mlx5e_tc_int_port *int_port)
		{
		return 0;
		}

		static inline int
		mlx5e_tc_int_port_get_flow_source(struct mlx5e_tc_int_port *int_port)
		{
		return 0;
		}

		static inline bool mlx5e_tc_int_port_supported(const struct mlx5_eswitch *esw)
		{
		return false;
		}

		static inline void mlx5e_tc_int_port_init_rep_rx(struct mlx5e_priv *priv) {}
		static inline void mlx5e_tc_int_port_cleanup_rep_rx(struct mlx5e_priv *priv) {}

		#endif /* CONFIG_MLX5_CLS_ACT */
		#endif /* __MLX5_EN_TC_INT_PORT_H__ */