Commit 2ab35ce2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'devicetree-fixes-for-6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull more devicetree updates from Rob Herring:
 "A couple of conversions which didn't get picked up by the subsystems
  and one fix:

   - Convert st,stih407-irq-syscfg and Omnivision OV7251 bindings to DT
     schema

   - Merge Omnivision OV5695 into OV5693 binding

   - Fix of_overlay_fdt_apply prototype when !CONFIG_OF_OVERLAY"

* tag 'devicetree-fixes-for-6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  dt-bindings: irqchip: convert st,stih407-irq-syscfg to DT schema
  media: dt-bindings: Convert Omnivision OV7251 to DT schema
  media: dt-bindings: Merge OV5695 into OV5693 binding
  of: overlay: Fix of_overlay_fdt_apply prototype when !CONFIG_OF_OVERLAY
parents 8d844b35 591b00cc
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@@ -269,6 +269,7 @@ examples:
                port {
                    ov7251_ep: endpoint {
                        data-lanes = <0 1>;
                        link-frequencies = /bits/ 64 <240000000 319200000>;
                        remote-endpoint = <&csiphy3_ep>;
                    };
                };
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STMicroelectronics STi System Configuration Controlled IRQs
-----------------------------------------------------------

On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
and PL310 L2 Cache IRQs are controlled using System Configuration registers.
This driver is used to unmask them prior to use.

Required properties:
- compatible	: Should be "st,stih407-irq-syscfg"
- st,syscfg	: Phandle to Cortex-A9 IRQ system config registers
- st,irq-device	: Array of IRQs to enable - should be 2 in length
- st,fiq-device	: Array of FIQs to enable - should be 2 in length

Optional properties:
- st,invert-ext	: External IRQs can be inverted at will.  This property inverts
		  these IRQs using bitwise logic.  A number of defines have been
		  provided for convenience:
			ST_IRQ_SYSCFG_EXT_1_INV
			ST_IRQ_SYSCFG_EXT_2_INV
			ST_IRQ_SYSCFG_EXT_3_INV
Example:

irq-syscfg {
	compatible    = "st,stih407-irq-syscfg";
	st,syscfg     = <&syscfg_cpu>;
	st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
			<ST_IRQ_SYSCFG_PMU_1>;
	st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
			<ST_IRQ_SYSCFG_DISABLED>;
};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: STMicroelectronics STi System Configuration Controlled IRQs

maintainers:
  - Patrice Chotard <patrice.chotard@foss.st.com>

description:
  On STi based systems; External, CTI (Core Sight), PMU (Performance
  Management), and PL310 L2 Cache IRQs are controlled using System
  Configuration registers.  This device is used to unmask them prior to use.

properties:
  compatible:
    const: st,stih407-irq-syscfg

  st,syscfg:
    description: Phandle to Cortex-A9 IRQ system config registers
    $ref: /schemas/types.yaml#/definitions/phandle

  st,irq-device:
    description: Array of IRQs to enable.
    $ref: /schemas/types.yaml#/definitions/uint32-array
    items:
      - description: Enable the IRQ of the channel one.
      - description: Enable the IRQ of the channel two.

  st,fiq-device:
    description: Array of FIQs to enable.
    $ref: /schemas/types.yaml#/definitions/uint32-array
    items:
      - description: Enable the IRQ of the channel one.
      - description: Enable the IRQ of the channel two.

  st,invert-ext:
    description: External IRQs can be inverted at will. This property inverts
      these three IRQs using bitwise logic, each one being encoded respectively
      on the first, second and fourth bit.
    $ref: /schemas/types.yaml#/definitions/uint32
    enum: [ 1, 2, 3, 4, 5, 6 ]

required:
  - compatible
  - st,syscfg
  - st,irq-device
  - st,fiq-device

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq-st.h>
    irq-syscfg {
        compatible    = "st,stih407-irq-syscfg";
        st,syscfg     = <&syscfg_cpu>;
        st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
                        <ST_IRQ_SYSCFG_PMU_1>;
        st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
                        <ST_IRQ_SYSCFG_DISABLED>;
    };
...
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* Omnivision OV5695 MIPI CSI-2 sensor

Required Properties:
- compatible: shall be "ovti,ov5695"
- clocks: reference to the xvclk input clock
- clock-names: shall be "xvclk"
- avdd-supply: Analog voltage supply, 2.8 volts
- dovdd-supply: Digital I/O voltage supply, 1.8 volts
- dvdd-supply: Digital core voltage supply, 1.2 volts
- reset-gpios: Low active reset gpio

The device node shall contain one 'port' child node with an
'endpoint' subnode for its digital output video port,
in accordance with the video interface bindings defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.
The endpoint optional property 'data-lanes' shall be "<1 2>".

Example:
&i2c7 {
	ov5695: camera-sensor@36 {
		compatible = "ovti,ov5695";
		reg = <0x36>;
		pinctrl-names = "default";
		pinctrl-0 = <&clk_24m_cam>;

		clocks = <&cru SCLK_TESTCLKOUT1>;
		clock-names = "xvclk";

		avdd-supply = <&pp2800_cam>;
		dovdd-supply = <&pp1800>;
		dvdd-supply = <&pp1250_cam>;
		reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;

		port {
			wcam_out: endpoint {
				remote-endpoint = <&mipi_in_wcam>;
				data-lanes = <1 2>;
			};
		};
	};
};
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* Omnivision 1/7.5-Inch B&W VGA CMOS Digital Image Sensor

The Omnivision OV7251 is a 1/7.5-Inch CMOS active pixel digital image sensor
with an active array size of 640H x 480V. It is programmable through a serial
I2C interface.

Required Properties:
- compatible: Value should be "ovti,ov7251".
- clocks: Reference to the xclk clock.
- clock-names: Should be "xclk".
- clock-frequency: Frequency of the xclk clock.
- enable-gpios: Chip enable GPIO. Polarity is GPIO_ACTIVE_HIGH. This corresponds
  to the hardware pin XSHUTDOWN which is physically active low.
- vdddo-supply: Chip digital IO regulator.
- vdda-supply: Chip analog regulator.
- vddd-supply: Chip digital core regulator.

The device node shall contain one 'port' child node with a single 'endpoint'
subnode for its digital output video port, in accordance with the video
interface bindings defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.

Example:

	&i2c1 {
		...

		ov7251: camera-sensor@60 {
			compatible = "ovti,ov7251";
			reg = <0x60>;

			enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
			pinctrl-names = "default";
			pinctrl-0 = <&camera_bw_default>;

			clocks = <&clks 200>;
			clock-names = "xclk";
			clock-frequency = <24000000>;

			vdddo-supply = <&camera_dovdd_1v8>;
			vdda-supply = <&camera_avdd_2v8>;
			vddd-supply = <&camera_dvdd_1v2>;

			port {
				ov7251_ep: endpoint {
					clock-lanes = <1>;
					data-lanes = <0>;
					remote-endpoint = <&csi0_ep>;
				};
			};
		};
	};
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