Commit 2aadcb0c authored by Kishon Vijay Abraham I's avatar Kishon Vijay Abraham I Committed by Lorenzo Pieralisi
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PCI: dwc: Fix ATU identification for designware version >= 4.80 



Synopsys designware version >= 4.80 uses a separate register space
for programming ATU. The current code identifies if there exists a
separate register space by accessing the register address of ATUs
in designware version < 4.80. Accessing this address results in
abort in the case of K2G.

Fix it here by adding "version" member to struct dw_pcie. This should be
set by platform specific drivers and designware core will use it to
identify if the platform has a separate ATU space. For platforms which
have not populated the version member, the old method of identification
will still be used.

Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: default avatarLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
parent a9f4c2d2

drivers/pci/controller/dwc/pcie-designware.c

+8 −6
Original line number Diff line number Diff line
@@ -358,13 +358,15 @@ void dw_pcie_setup(struct dw_pcie *pci) 
	struct device *dev = pci->dev;

	struct device_node *np = dev->of_node;



	/* Get iATU unroll support */

	pci->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pci);

	dev_dbg(pci->dev, "iATU unroll: %s\n",

		pci->iatu_unroll_enabled ? "enabled" : "disabled");



	if (pci->iatu_unroll_enabled && !pci->atu_base)

	if (pci->version >= 0x480A || (!pci->version &&

				       dw_pcie_iatu_unroll_enabled(pci))) {

		pci->iatu_unroll_enabled = true;

		if (!pci->atu_base)

			pci->atu_base = pci->dbi_base + DEFAULT_DBI_ATU_OFFSET;

	}

	dev_dbg(pci->dev, "iATU unroll: %s\n", pci->iatu_unroll_enabled ?

		"enabled" : "disabled");





	ret = of_property_read_u32(np, "num-lanes", &lanes);

	if (ret)

drivers/pci/controller/dwc/pcie-designware.h

+1 −0
Original line number Diff line number Diff line
@@ -234,6 +234,7 @@ struct dw_pcie { 
	struct pcie_port	pp;

	struct dw_pcie_ep	ep;

	const struct dw_pcie_ops *ops;

	unsigned int		version;

};



#define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)