Commit 2a29fe83 authored by Niravkumar L Rabara's avatar Niravkumar L Rabara Committed by Dinh Nguyen
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dt-bindings: reset: add reset IDs for Agilex5



Add reset ID definitions required for Intel Agilex5 SoCFPGA, re-use
altr,rst-mgr-s10.h as common header file similar S10 & Agilex.

Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarDinh Nguyen <dinguyen@kernel.org>
Signed-off-by: default avatarNiravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: default avatarDinh Nguyen <dinguyen@kernel.org>
parent f2376835
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+4 −1
Original line number Diff line number Diff line
@@ -63,12 +63,15 @@
#define I2C2_RESET		74
#define I2C3_RESET		75
#define I2C4_RESET		76
/* 77-79 is empty */
#define I3C0_RESET		77
#define I3C1_RESET		78
/* 79 is empty */
#define UART0_RESET		80
#define UART1_RESET		81
/* 82-87 is empty */
#define GPIO0_RESET		88
#define GPIO1_RESET		89
#define WATCHDOG4_RESET		90

/* BRGMODRST */
#define SOC2FPGA_RESET		96