Commit 298af153 authored by Bjorn Andersson's avatar Bjorn Andersson
Browse files

Merge branch '20220223172248.18877-1-tdas@codeaurora.org' into clk-for-5.19

parents 41219ff6 4185b27b

Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm LPASS Core & Audio Clock Controller Binding for SC7280



maintainers:

  - Taniya Das <tdas@codeaurora.org>



description: |

  Qualcomm LPASS core and audio clock control module which supports the

  clocks and power domains on SC7280.



  See also:

  - dt-bindings/clock/qcom,lpasscorecc-sc7280.h

  - dt-bindings/clock/qcom,lpassaudiocc-sc7280.h



properties:

  clocks: true



  clock-names: true



  compatible:

    enum:

      - qcom,sc7280-lpassaoncc

      - qcom,sc7280-lpassaudiocc

      - qcom,sc7280-lpasscorecc

      - qcom,sc7280-lpasshm



  power-domains:

    maxItems: 1



  '#clock-cells':

    const: 1



  '#power-domain-cells':

    const: 1



  reg:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks

  - clock-names

  - '#clock-cells'

  - '#power-domain-cells'



additionalProperties: false



allOf:

  - if:

      properties:

        compatible:

          contains:

            const: qcom,sc7280-lpassaudiocc



    then:

      properties:

        clocks:

          items:

            - description: Board XO source

            - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC



        clock-names:

          items:

            - const: bi_tcxo

            - const: lpass_aon_cc_main_rcg_clk_src

  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sc7280-lpassaoncc



    then:

      properties:

        clocks:

          items:

            - description: Board XO source

            - description: Board XO active only source

            - description: LPASS_AON_CC_MAIN_RCG_CLK_SRC



        clock-names:

          items:

            - const: bi_tcxo

            - const: bi_tcxo_ao

            - const: iface



  - if:

      properties:

        compatible:

          contains:

            enum:

              - qcom,sc7280-lpasshm

              - qcom,sc7280-lpasscorecc



    then:

      properties:

        clocks:

          items:

            - description: Board XO source



        clock-names:

          items:

            - const: bi_tcxo



examples:

  - |

    #include <dt-bindings/clock/qcom,rpmh.h>

    #include <dt-bindings/clock/qcom,gcc-sc7280.h>

    #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>

    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>

    lpass_audiocc: clock-controller@3300000 {

      compatible = "qcom,sc7280-lpassaudiocc";

      reg = <0x3300000 0x30000>;

      clocks = <&rpmhcc RPMH_CXO_CLK>,

               <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;

      clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";

      power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;

      #clock-cells = <1>;

      #power-domain-cells = <1>;

    };



  - |

    #include <dt-bindings/clock/qcom,rpmh.h>

    #include <dt-bindings/clock/qcom,gcc-sc7280.h>

    #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>

    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>

    lpass_hm: clock-controller@3c00000 {

      compatible = "qcom,sc7280-lpasshm";

      reg = <0x3c00000 0x28>;

      clocks = <&rpmhcc RPMH_CXO_CLK>;

      clock-names = "bi_tcxo";

      #clock-cells = <1>;

      #power-domain-cells = <1>;

    };



  - |

    #include <dt-bindings/clock/qcom,rpmh.h>

    #include <dt-bindings/clock/qcom,gcc-sc7280.h>

    #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>

    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>

    lpasscore: clock-controller@3900000 {

      compatible = "qcom,sc7280-lpasscorecc";

      reg = <0x3900000 0x50000>;

      clocks = <&rpmhcc RPMH_CXO_CLK>;

      clock-names = "bi_tcxo";

      power-domains = <&lpass_hm LPASS_CORE_CC_LPASS_CORE_HM_GDSC>;

      #clock-cells = <1>;

      #power-domain-cells = <1>;

    };



  - |

    #include <dt-bindings/clock/qcom,rpmh.h>

    #include <dt-bindings/clock/qcom,gcc-sc7280.h>

    #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>

    #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>

    lpass_aon: clock-controller@3380000 {

      compatible = "qcom,sc7280-lpassaoncc";

      reg = <0x3380000 0x30000>;

      clocks = <&rpmhcc RPMH_CXO_CLK>, <&rpmhcc RPMH_CXO_CLK_A>,

               <&lpasscore LPASS_CORE_CC_CORE_CLK>;

      clock-names = "bi_tcxo", "bi_tcxo_ao","iface";

      #clock-cells = <1>;

      #power-domain-cells = <1>;

    };



...

include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h

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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */

/*

 * Copyright (c) 2021, The Linux Foundation. All rights reserved.

 */



#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H

#define _DT_BINDINGS_CLK_QCOM_LPASS_AUDIO_CC_SC7280_H



/* LPASS_AUDIO_CC clocks */

#define LPASS_AUDIO_CC_PLL				0

#define LPASS_AUDIO_CC_PLL_OUT_AUX2			1

#define LPASS_AUDIO_CC_PLL_OUT_AUX2_DIV_CLK_SRC		2

#define LPASS_AUDIO_CC_PLL_OUT_MAIN_DIV_CLK_SRC		3

#define LPASS_AUDIO_CC_CDIV_RX_MCLK_DIV_CLK_SRC		4

#define LPASS_AUDIO_CC_CODEC_MEM0_CLK			5

#define LPASS_AUDIO_CC_CODEC_MEM1_CLK			6

#define LPASS_AUDIO_CC_CODEC_MEM2_CLK			7

#define LPASS_AUDIO_CC_CODEC_MEM_CLK			8

#define LPASS_AUDIO_CC_EXT_MCLK0_CLK			9

#define LPASS_AUDIO_CC_EXT_MCLK0_CLK_SRC		10

#define LPASS_AUDIO_CC_EXT_MCLK1_CLK			11

#define LPASS_AUDIO_CC_EXT_MCLK1_CLK_SRC		12

#define LPASS_AUDIO_CC_RX_MCLK_2X_CLK			13

#define LPASS_AUDIO_CC_RX_MCLK_CLK			14

#define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC			15



/* LPASS_AON_CC clocks */

#define LPASS_AON_CC_PLL				0

#define LPASS_AON_CC_PLL_OUT_EVEN			1

#define LPASS_AON_CC_PLL_OUT_MAIN_CDIV_DIV_CLK_SRC	2

#define LPASS_AON_CC_PLL_OUT_ODD			3

#define LPASS_AON_CC_AUDIO_HM_H_CLK			4

#define LPASS_AON_CC_CDIV_TX_MCLK_DIV_CLK_SRC		5

#define LPASS_AON_CC_MAIN_RCG_CLK_SRC			6

#define LPASS_AON_CC_TX_MCLK_2X_CLK			7

#define LPASS_AON_CC_TX_MCLK_CLK			8

#define LPASS_AON_CC_TX_MCLK_RCG_CLK_SRC		9

#define LPASS_AON_CC_VA_MEM0_CLK			10



/* LPASS_AON_CC power domains */

#define LPASS_AON_CC_LPASS_AUDIO_HM_GDSC		0



#endif

include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h

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/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */

/*

 * Copyright (c) 2021, The Linux Foundation. All rights reserved.

 */



#ifndef _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H

#define _DT_BINDINGS_CLK_QCOM_LPASS_CORE_CC_SC7280_H



/* LPASS_CORE_CC clocks */

#define LPASS_CORE_CC_DIG_PLL				0

#define LPASS_CORE_CC_DIG_PLL_OUT_MAIN_DIV_CLK_SRC	1

#define LPASS_CORE_CC_DIG_PLL_OUT_ODD			2

#define LPASS_CORE_CC_CORE_CLK				3

#define LPASS_CORE_CC_CORE_CLK_SRC			4

#define LPASS_CORE_CC_EXT_IF0_CLK_SRC			5

#define LPASS_CORE_CC_EXT_IF0_IBIT_CLK			6

#define LPASS_CORE_CC_EXT_IF1_CLK_SRC			7

#define LPASS_CORE_CC_EXT_IF1_IBIT_CLK			8

#define LPASS_CORE_CC_LPM_CORE_CLK			9

#define LPASS_CORE_CC_LPM_MEM0_CORE_CLK			10

#define LPASS_CORE_CC_SYSNOC_MPORT_CORE_CLK		11



/* LPASS_CORE_CC power domains */

#define LPASS_CORE_CC_LPASS_CORE_HM_GDSC		0



#endif