Commit 294080ea authored by Ajish Koshy's avatar Ajish Koshy Committed by Martin K. Petersen
Browse files

scsi: pm80xx: Mask and unmask upper interrupt vectors 32-63 

When upper inbound and outbound queues 32-63 are enabled, we see upper
vectors 32-63 in interrupt service routine. We need corresponding registers
to handle masking and unmasking of these upper interrupts.

To achieve this, we use registers MSGU_ODMR_U(0x34) to mask and
MSGU_ODMR_CLR_U(0x3C) to unmask the interrupts. In these registers bit 0-31
represents interrupt vectors 32-63.

Link: https://lore.kernel.org/r/20220411064603.668448-2-Ajish.Koshy@microchip.com


Fixes: 05c6c029 ("scsi: pm80xx: Increase number of supported queues")
Reviewed-by: default avatarJohn Garry <john.garry@huawei.com>
Acked-by: default avatarJack Wang <jinpu.wang@ionos.com>
Signed-off-by: default avatarAjish Koshy <Ajish.Koshy@microchip.com>
Signed-off-by: default avatarViswas G <Viswas.G@microchip.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent f19fe8f3

drivers/scsi/pm8001/pm80xx_hwi.c

+13 −9
Original line number Diff line number Diff line
@@ -1727,10 +1727,11 @@ static void 
pm80xx_chip_interrupt_enable(struct pm8001_hba_info *pm8001_ha, u8 vec)

{

#ifdef PM8001_USE_MSIX

	u32 mask;

	mask = (u32)(1 << vec);



	pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, (u32)(mask & 0xFFFFFFFF));

	if (vec < 32)

		pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR, 1U << vec);

	else

		pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_CLR_U,

			    1U << (vec - 32));

	return;

#endif

	pm80xx_chip_intx_interrupt_enable(pm8001_ha);
@@ -1746,12 +1747,15 @@ static void 
pm80xx_chip_interrupt_disable(struct pm8001_hba_info *pm8001_ha, u8 vec)

{

#ifdef PM8001_USE_MSIX

	u32 mask;

	if (vec == 0xFF)

		mask = 0xFFFFFFFF;

	if (vec == 0xFF) {

		/* disable all vectors 0-31, 32-63 */

		pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 0xFFFFFFFF);

		pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U, 0xFFFFFFFF);

	} else if (vec < 32)

		pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, 1U << vec);

	else

		mask = (u32)(1 << vec);

	pm8001_cw32(pm8001_ha, 0, MSGU_ODMR, (u32)(mask & 0xFFFFFFFF));

		pm8001_cw32(pm8001_ha, 0, MSGU_ODMR_U,

			    1U << (vec - 32));

	return;

#endif

	pm80xx_chip_intx_interrupt_disable(pm8001_ha);