Unverified Commit 292709b9 authored by Shengjiu Wang's avatar Shengjiu Wang Committed by Mark Brown
Browse files

ASoC: fsl_micfil: explicitly clear software reset bit 



SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined as
non volatile register, it still remain in regmap cache after set,
then every update of REG_MICFIL_CTRL1, software reset happens.
to avoid this, clear it explicitly.

Signed-off-by: default avatarShengjiu Wang <shengjiu.wang@nxp.com>
Link: https://lore.kernel.org/r/1651925654-32060-1-git-send-email-shengjiu.wang@nxp.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent a962890a

sound/soc/fsl/fsl_micfil.c

+11 −0
Original line number Diff line number Diff line
@@ -191,6 +191,17 @@ static int fsl_micfil_reset(struct device *dev) 
		return ret;

	}



	/*

	 * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined

	 * as non-volatile register, so SRES still remain in regmap

	 * cache after set, that every update of REG_MICFIL_CTRL1,

	 * software reset happens. so clear it explicitly.

	 */

	ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,

				MICFIL_CTRL1_SRES);

	if (ret)

		return ret;



	return 0;

}