Unverified Commit 2925b582 authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Mark Brown
Browse files

ASoC: codecs: da*: rename to snd_soc_component_read()



We need to use snd_soc_component_read()
instead of     snd_soc_component_read32()

This patch renames _read32() to _read()

Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: default avatarAdam Thomson <Adam.Thomson.Opensource@diasemi.com>
Link: https://lore.kernel.org/r/87bllj4mc8.wl-kuninori.morimoto.gx@renesas.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 467a2553
Loading
Loading
Loading
Loading
+12 −12
Original line number Diff line number Diff line
@@ -330,7 +330,7 @@ static int da7210_put_alc_sw(struct snd_kcontrol *kcontrol,

	if (ucontrol->value.integer.value[0]) {
		/* Check if noise suppression is enabled */
		if (snd_soc_component_read32(component, DA7210_CONTROL) & DA7210_NOISE_SUP_EN) {
		if (snd_soc_component_read(component, DA7210_CONTROL) & DA7210_NOISE_SUP_EN) {
			dev_dbg(component->dev,
				"Disable noise suppression to enable ALC\n");
			return -EINVAL;
@@ -354,27 +354,27 @@ static int da7210_put_noise_sup_sw(struct snd_kcontrol *kcontrol,

	if (ucontrol->value.integer.value[0]) {
		/* Check if ALC is enabled */
		if (snd_soc_component_read32(component, DA7210_ADC) & DA7210_ADC_ALC_EN)
		if (snd_soc_component_read(component, DA7210_ADC) & DA7210_ADC_ALC_EN)
			goto err;

		/* Check ZC for HP and AUX1 PGA */
		if ((snd_soc_component_read32(component, DA7210_ZERO_CROSS) &
		if ((snd_soc_component_read(component, DA7210_ZERO_CROSS) &
			(DA7210_AUX1_L_ZC | DA7210_AUX1_R_ZC | DA7210_HP_L_ZC |
			DA7210_HP_R_ZC)) != (DA7210_AUX1_L_ZC |
			DA7210_AUX1_R_ZC | DA7210_HP_L_ZC | DA7210_HP_R_ZC))
			goto err;

		/* Check INPGA_L_VOL and INPGA_R_VOL */
		val = snd_soc_component_read32(component, DA7210_IN_GAIN);
		val = snd_soc_component_read(component, DA7210_IN_GAIN);
		if (((val & DA7210_INPGA_L_VOL) < DA7210_INPGA_MIN_VOL_NS) ||
			(((val & DA7210_INPGA_R_VOL) >> 4) <
			DA7210_INPGA_MIN_VOL_NS))
			goto err;

		/* Check AUX1_L_VOL and AUX1_R_VOL */
		if (((snd_soc_component_read32(component, DA7210_AUX1_L) & DA7210_AUX1_L_VOL) <
		if (((snd_soc_component_read(component, DA7210_AUX1_L) & DA7210_AUX1_L_VOL) <
		    DA7210_AUX1_MIN_VOL_NS) ||
		    ((snd_soc_component_read32(component, DA7210_AUX1_R) & DA7210_AUX1_R_VOL) <
		    ((snd_soc_component_read(component, DA7210_AUX1_R) & DA7210_AUX1_R_VOL) <
		    DA7210_AUX1_MIN_VOL_NS))
			goto err;
	}
@@ -767,7 +767,7 @@ static int da7210_hw_params(struct snd_pcm_substream *substream,
	/* Enable DAI */
	snd_soc_component_write(component, DA7210_DAI_CFG3, DA7210_DAI_OE | DA7210_DAI_EN);

	dai_cfg1 = 0xFC & snd_soc_component_read32(component, DA7210_DAI_CFG1);
	dai_cfg1 = 0xFC & snd_soc_component_read(component, DA7210_DAI_CFG1);

	switch (params_width(params)) {
	case 16:
@@ -874,11 +874,11 @@ static int da7210_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt)
	u32 dai_cfg1;
	u32 dai_cfg3;

	dai_cfg1 = 0x7f & snd_soc_component_read32(component, DA7210_DAI_CFG1);
	dai_cfg3 = 0xfc & snd_soc_component_read32(component, DA7210_DAI_CFG3);
	dai_cfg1 = 0x7f & snd_soc_component_read(component, DA7210_DAI_CFG1);
	dai_cfg3 = 0xfc & snd_soc_component_read(component, DA7210_DAI_CFG3);

	if ((snd_soc_component_read32(component, DA7210_PLL) & DA7210_PLL_EN) &&
		(!(snd_soc_component_read32(component, DA7210_PLL_DIV3) & DA7210_PLL_BYP)))
	if ((snd_soc_component_read(component, DA7210_PLL) & DA7210_PLL_EN) &&
		(!(snd_soc_component_read(component, DA7210_PLL_DIV3) & DA7210_PLL_BYP)))
		return -EINVAL;

	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@@ -927,7 +927,7 @@ static int da7210_set_dai_fmt(struct snd_soc_dai *codec_dai, u32 fmt)
static int da7210_mute(struct snd_soc_dai *dai, int mute)
{
	struct snd_soc_component *component = dai->component;
	u8 mute_reg = snd_soc_component_read32(component, DA7210_DAC_HPF) & 0xFB;
	u8 mute_reg = snd_soc_component_read(component, DA7210_DAC_HPF) & 0xFB;

	if (mute)
		snd_soc_component_write(component, DA7210_DAC_HPF, mute_reg | 0x4);
+12 −12
Original line number Diff line number Diff line
@@ -205,12 +205,12 @@ static int da7213_get_alc_data(struct snd_soc_component *component, u8 reg_val)
		/* Select middle 8 bits for read back from data register */
		snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
			      reg_val | DA7213_ALC_DATA_MIDDLE);
		mid_data = snd_soc_component_read32(component, DA7213_ALC_CIC_OP_LVL_DATA);
		mid_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);

		/* Select top 8 bits for read back from data register */
		snd_soc_component_write(component, DA7213_ALC_CIC_OP_LVL_CTRL,
			      reg_val | DA7213_ALC_DATA_TOP);
		top_data = snd_soc_component_read32(component, DA7213_ALC_CIC_OP_LVL_DATA);
		top_data = snd_soc_component_read(component, DA7213_ALC_CIC_OP_LVL_DATA);

		sum += ((mid_data << 8) | (top_data << 16));
	}
@@ -259,7 +259,7 @@ static void da7213_alc_calib_auto(struct snd_soc_component *component)
	snd_soc_component_update_bits(component, DA7213_ALC_CTRL1, DA7213_ALC_AUTO_CALIB_EN,
			    DA7213_ALC_AUTO_CALIB_EN);
	do {
		alc_ctrl1 = snd_soc_component_read32(component, DA7213_ALC_CTRL1);
		alc_ctrl1 = snd_soc_component_read(component, DA7213_ALC_CTRL1);
	} while (alc_ctrl1 & DA7213_ALC_AUTO_CALIB_EN);

	/* If auto calibration fails, fall back to digital gain only mode */
@@ -286,16 +286,16 @@ static void da7213_alc_calib(struct snd_soc_component *component)
	u8 mic_1_ctrl, mic_2_ctrl;

	/* Save current values from ADC control registers */
	adc_l_ctrl = snd_soc_component_read32(component, DA7213_ADC_L_CTRL);
	adc_r_ctrl = snd_soc_component_read32(component, DA7213_ADC_R_CTRL);
	adc_l_ctrl = snd_soc_component_read(component, DA7213_ADC_L_CTRL);
	adc_r_ctrl = snd_soc_component_read(component, DA7213_ADC_R_CTRL);

	/* Save current values from MIXIN_L/R_SELECT registers */
	mixin_l_sel = snd_soc_component_read32(component, DA7213_MIXIN_L_SELECT);
	mixin_r_sel = snd_soc_component_read32(component, DA7213_MIXIN_R_SELECT);
	mixin_l_sel = snd_soc_component_read(component, DA7213_MIXIN_L_SELECT);
	mixin_r_sel = snd_soc_component_read(component, DA7213_MIXIN_R_SELECT);

	/* Save current values from MIC control registers */
	mic_1_ctrl = snd_soc_component_read32(component, DA7213_MIC_1_CTRL);
	mic_2_ctrl = snd_soc_component_read32(component, DA7213_MIC_2_CTRL);
	mic_1_ctrl = snd_soc_component_read(component, DA7213_MIC_1_CTRL);
	mic_2_ctrl = snd_soc_component_read(component, DA7213_MIC_2_CTRL);

	/* Enable ADC Left and Right */
	snd_soc_component_update_bits(component, DA7213_ADC_L_CTRL, DA7213_ADC_EN,
@@ -751,7 +751,7 @@ static int da7213_dai_event(struct snd_soc_dapm_widget *w,
				    DA7213_PC_FREERUN_MASK, 0);

		/* If SRM not enabled then nothing more to do */
		pll_ctrl = snd_soc_component_read32(component, DA7213_PLL_CTRL);
		pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
		if (!(pll_ctrl & DA7213_PLL_SRM_EN))
			return 0;

@@ -764,7 +764,7 @@ static int da7213_dai_event(struct snd_soc_dapm_widget *w,

		/* Check SRM has locked */
		do {
			pll_status = snd_soc_component_read32(component, DA7213_PLL_STATUS);
			pll_status = snd_soc_component_read(component, DA7213_PLL_STATUS);
			if (pll_status & DA7219_PLL_SRM_LOCK) {
				srm_lock = true;
			} else {
@@ -779,7 +779,7 @@ static int da7213_dai_event(struct snd_soc_dapm_widget *w,
		return 0;
	case SND_SOC_DAPM_POST_PMD:
		/* Revert 32KHz PLL lock udpates if applied previously */
		pll_ctrl = snd_soc_component_read32(component, DA7213_PLL_CTRL);
		pll_ctrl = snd_soc_component_read(component, DA7213_PLL_CTRL);
		if (pll_ctrl & DA7213_PLL_32K_MODE) {
			snd_soc_component_write(component, 0xF0, 0x8B);
			snd_soc_component_write(component, 0xF2, 0x01);
+17 −17
Original line number Diff line number Diff line
@@ -298,22 +298,22 @@ static void da7218_alc_calib(struct snd_soc_component *component)
	bool calibrated = false;

	/* Save current state of MIC control registers */
	mic_1_ctrl = snd_soc_component_read32(component, DA7218_MIC_1_CTRL);
	mic_2_ctrl = snd_soc_component_read32(component, DA7218_MIC_2_CTRL);
	mic_1_ctrl = snd_soc_component_read(component, DA7218_MIC_1_CTRL);
	mic_2_ctrl = snd_soc_component_read(component, DA7218_MIC_2_CTRL);

	/* Save current state of input mixer control registers */
	mixin_1_ctrl = snd_soc_component_read32(component, DA7218_MIXIN_1_CTRL);
	mixin_2_ctrl = snd_soc_component_read32(component, DA7218_MIXIN_2_CTRL);
	mixin_1_ctrl = snd_soc_component_read(component, DA7218_MIXIN_1_CTRL);
	mixin_2_ctrl = snd_soc_component_read(component, DA7218_MIXIN_2_CTRL);

	/* Save current state of input filter control registers */
	in_1l_filt_ctrl = snd_soc_component_read32(component, DA7218_IN_1L_FILTER_CTRL);
	in_1r_filt_ctrl = snd_soc_component_read32(component, DA7218_IN_1R_FILTER_CTRL);
	in_2l_filt_ctrl = snd_soc_component_read32(component, DA7218_IN_2L_FILTER_CTRL);
	in_2r_filt_ctrl = snd_soc_component_read32(component, DA7218_IN_2R_FILTER_CTRL);
	in_1l_filt_ctrl = snd_soc_component_read(component, DA7218_IN_1L_FILTER_CTRL);
	in_1r_filt_ctrl = snd_soc_component_read(component, DA7218_IN_1R_FILTER_CTRL);
	in_2l_filt_ctrl = snd_soc_component_read(component, DA7218_IN_2L_FILTER_CTRL);
	in_2r_filt_ctrl = snd_soc_component_read(component, DA7218_IN_2R_FILTER_CTRL);

	/* Save current state of input HPF control registers */
	in_1_hpf_ctrl = snd_soc_component_read32(component, DA7218_IN_1_HPF_FILTER_CTRL);
	in_2_hpf_ctrl = snd_soc_component_read32(component, DA7218_IN_2_HPF_FILTER_CTRL);
	in_1_hpf_ctrl = snd_soc_component_read(component, DA7218_IN_1_HPF_FILTER_CTRL);
	in_2_hpf_ctrl = snd_soc_component_read(component, DA7218_IN_2_HPF_FILTER_CTRL);

	/* Enable then Mute MIC PGAs */
	snd_soc_component_update_bits(component, DA7218_MIC_1_CTRL, DA7218_MIC_1_AMP_EN_MASK,
@@ -369,7 +369,7 @@ static void da7218_alc_calib(struct snd_soc_component *component)
	snd_soc_component_update_bits(component, DA7218_CALIB_CTRL, DA7218_CALIB_AUTO_EN_MASK,
			    DA7218_CALIB_AUTO_EN_MASK);
	do {
		calib_ctrl = snd_soc_component_read32(component, DA7218_CALIB_CTRL);
		calib_ctrl = snd_soc_component_read(component, DA7218_CALIB_CTRL);
		if (calib_ctrl & DA7218_CALIB_AUTO_EN_MASK) {
			++i;
			usleep_range(DA7218_ALC_CALIB_DELAY_MIN,
@@ -613,7 +613,7 @@ static int da7218_biquad_coeff_put(struct snd_kcontrol *kcontrol,
	}

	/* Make sure at least out filter1 enabled to allow programming */
	out_filt1l = snd_soc_component_read32(component, DA7218_OUT_1L_FILTER_CTRL);
	out_filt1l = snd_soc_component_read(component, DA7218_OUT_1L_FILTER_CTRL);
	snd_soc_component_write(component, DA7218_OUT_1L_FILTER_CTRL,
		      out_filt1l | DA7218_OUT_1L_FILTER_EN_MASK);

@@ -1419,7 +1419,7 @@ static int da7218_dai_event(struct snd_soc_dapm_widget *w,
		i = 0;
		success = false;
		do {
			refosc_cal = snd_soc_component_read32(component, DA7218_PLL_REFOSC_CAL);
			refosc_cal = snd_soc_component_read(component, DA7218_PLL_REFOSC_CAL);
			if (!(refosc_cal & DA7218_PLL_REFOSC_CAL_START_MASK)) {
				success = true;
			} else {
@@ -1438,7 +1438,7 @@ static int da7218_dai_event(struct snd_soc_dapm_widget *w,
			      DA7218_PC_RESYNC_AUTO_MASK);

		/* If SRM not enabled, we don't need to check status */
		pll_ctrl = snd_soc_component_read32(component, DA7218_PLL_CTRL);
		pll_ctrl = snd_soc_component_read(component, DA7218_PLL_CTRL);
		if ((pll_ctrl & DA7218_PLL_MODE_MASK) != DA7218_PLL_MODE_SRM)
			return 0;

@@ -1446,7 +1446,7 @@ static int da7218_dai_event(struct snd_soc_dapm_widget *w,
		i = 0;
		success = false;
		do {
			pll_status = snd_soc_component_read32(component, DA7218_PLL_STATUS);
			pll_status = snd_soc_component_read(component, DA7218_PLL_STATUS);
			if (pll_status & DA7218_PLL_SRM_STATUS_SRM_LOCK) {
				success = true;
			} else {
@@ -2236,7 +2236,7 @@ static void da7218_hpldet_irq(struct snd_soc_component *component)
	u8 jack_status;
	int report;

	jack_status = snd_soc_component_read32(component, DA7218_EVENT_STATUS);
	jack_status = snd_soc_component_read(component, DA7218_EVENT_STATUS);

	if (jack_status & DA7218_HPLDET_JACK_STS_MASK)
		report = SND_JACK_HEADPHONE;
@@ -2256,7 +2256,7 @@ static irqreturn_t da7218_irq_thread(int irq, void *data)
	u8 status;

	/* Read IRQ status reg */
	status = snd_soc_component_read32(component, DA7218_EVENT);
	status = snd_soc_component_read(component, DA7218_EVENT);
	if (!status)
		return IRQ_NONE;

+8 −8
Original line number Diff line number Diff line
@@ -73,7 +73,7 @@ static void da7219_aad_btn_det_work(struct work_struct *work)
	snd_soc_dapm_sync(dapm);

	do {
		statusa = snd_soc_component_read32(component, DA7219_ACCDET_STATUS_A);
		statusa = snd_soc_component_read(component, DA7219_ACCDET_STATUS_A);
		if (statusa & DA7219_MICBIAS_UP_STS_MASK)
			micbias_up = true;
		else if (retries++ < DA7219_AAD_MICBIAS_CHK_RETRIES)
@@ -91,7 +91,7 @@ static void da7219_aad_btn_det_work(struct work_struct *work)
	 */
	if (da7219_aad->micbias_pulse_lvl && da7219_aad->micbias_pulse_time) {
		/* Pulse higher level voltage */
		micbias_ctrl = snd_soc_component_read32(component, DA7219_MICBIAS_CTRL);
		micbias_ctrl = snd_soc_component_read(component, DA7219_MICBIAS_CTRL);
		snd_soc_component_update_bits(component, DA7219_MICBIAS_CTRL,
				    DA7219_MICBIAS1_LEVEL_MASK,
				    da7219_aad->micbias_pulse_lvl);
@@ -141,11 +141,11 @@ static void da7219_aad_hptest_work(struct work_struct *work)
	 * If MCLK is present, but PLL is not enabled then we enable it here to
	 * ensure a consistent detection procedure.
	 */
	pll_srm_sts = snd_soc_component_read32(component, DA7219_PLL_SRM_STS);
	pll_srm_sts = snd_soc_component_read(component, DA7219_PLL_SRM_STS);
	if (pll_srm_sts & DA7219_PLL_SRM_STS_MCLK) {
		tonegen_freq_hptest = cpu_to_le16(DA7219_AAD_HPTEST_RAMP_FREQ);

		pll_ctrl = snd_soc_component_read32(component, DA7219_PLL_CTRL);
		pll_ctrl = snd_soc_component_read(component, DA7219_PLL_CTRL);
		if ((pll_ctrl & DA7219_PLL_MODE_MASK) == DA7219_PLL_MODE_BYPASS)
			da7219_set_pll(component, DA7219_SYSCLK_PLL,
				       DA7219_PLL_FREQ_OUT_98304);
@@ -154,7 +154,7 @@ static void da7219_aad_hptest_work(struct work_struct *work)
	}

	/* Ensure gain ramping at fastest rate */
	gain_ramp_ctrl = snd_soc_component_read32(component, DA7219_GAIN_RAMP_CTRL);
	gain_ramp_ctrl = snd_soc_component_read(component, DA7219_GAIN_RAMP_CTRL);
	snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL, DA7219_GAIN_RAMP_RATE_X8);

	/* Bypass cache so it saves current settings */
@@ -248,7 +248,7 @@ static void da7219_aad_hptest_work(struct work_struct *work)
	msleep(DA7219_AAD_HPTEST_PERIOD);

	/* Grab comparator reading */
	accdet_cfg8 = snd_soc_component_read32(component, DA7219_ACCDET_CONFIG_8);
	accdet_cfg8 = snd_soc_component_read(component, DA7219_ACCDET_CONFIG_8);
	if (accdet_cfg8 & DA7219_HPTEST_COMP_MASK)
		report |= SND_JACK_HEADPHONE;
	else
@@ -357,7 +357,7 @@ static irqreturn_t da7219_aad_irq_thread(int irq, void *data)
		return IRQ_NONE;

	/* Read status register for jack insertion & type status */
	statusa = snd_soc_component_read32(component, DA7219_ACCDET_STATUS_A);
	statusa = snd_soc_component_read(component, DA7219_ACCDET_STATUS_A);

	/* Clear events */
	regmap_bulk_write(da7219->regmap, DA7219_ACCDET_IRQ_EVENT_A,
@@ -847,7 +847,7 @@ void da7219_aad_suspend(struct snd_soc_component *component)
		 * suspend then this will be dealt with through the IRQ handler.
		 */
		if (da7219_aad->jack_inserted) {
			micbias_ctrl = snd_soc_component_read32(component, DA7219_MICBIAS_CTRL);
			micbias_ctrl = snd_soc_component_read(component, DA7219_MICBIAS_CTRL);
			if (micbias_ctrl & DA7219_MICBIAS1_EN_MASK) {
				snd_soc_dapm_disable_pin(dapm, "Mic Bias");
				snd_soc_dapm_sync(dapm);
+10 −10
Original line number Diff line number Diff line
@@ -313,13 +313,13 @@ static void da7219_alc_calib(struct snd_soc_component *component)
	u8 mic_ctrl, mixin_ctrl, adc_ctrl, calib_ctrl;

	/* Save current state of mic control register */
	mic_ctrl = snd_soc_component_read32(component, DA7219_MIC_1_CTRL);
	mic_ctrl = snd_soc_component_read(component, DA7219_MIC_1_CTRL);

	/* Save current state of input mixer control register */
	mixin_ctrl = snd_soc_component_read32(component, DA7219_MIXIN_L_CTRL);
	mixin_ctrl = snd_soc_component_read(component, DA7219_MIXIN_L_CTRL);

	/* Save current state of input ADC control register */
	adc_ctrl = snd_soc_component_read32(component, DA7219_ADC_L_CTRL);
	adc_ctrl = snd_soc_component_read(component, DA7219_ADC_L_CTRL);

	/* Enable then Mute MIC PGAs */
	snd_soc_component_update_bits(component, DA7219_MIC_1_CTRL, DA7219_MIC_1_AMP_EN_MASK,
@@ -344,7 +344,7 @@ static void da7219_alc_calib(struct snd_soc_component *component)
			    DA7219_ALC_AUTO_CALIB_EN_MASK,
			    DA7219_ALC_AUTO_CALIB_EN_MASK);
	do {
		calib_ctrl = snd_soc_component_read32(component, DA7219_ALC_CTRL1);
		calib_ctrl = snd_soc_component_read(component, DA7219_ALC_CTRL1);
	} while (calib_ctrl & DA7219_ALC_AUTO_CALIB_EN_MASK);

	/* If auto calibration fails, disable DC offset, hybrid ALC */
@@ -822,13 +822,13 @@ static int da7219_dai_event(struct snd_soc_dapm_widget *w,
				    DA7219_PC_FREERUN_MASK, 0);

		/* Slave mode, if SRM not enabled no need for status checks */
		pll_ctrl = snd_soc_component_read32(component, DA7219_PLL_CTRL);
		pll_ctrl = snd_soc_component_read(component, DA7219_PLL_CTRL);
		if ((pll_ctrl & DA7219_PLL_MODE_MASK) != DA7219_PLL_MODE_SRM)
			return 0;

		/* Check SRM has locked */
		do {
			pll_status = snd_soc_component_read32(component, DA7219_PLL_SRM_STS);
			pll_status = snd_soc_component_read(component, DA7219_PLL_SRM_STS);
			if (pll_status & DA7219_PLL_SRM_STS_SRM_LOCK) {
				srm_lock = true;
			} else {
@@ -928,7 +928,7 @@ static int da7219_gain_ramp_event(struct snd_soc_dapm_widget *w,
	case SND_SOC_DAPM_PRE_PMD:
		/* Ensure nominal gain ramping for DAPM sequence */
		da7219->gain_ramp_ctrl =
			snd_soc_component_read32(component, DA7219_GAIN_RAMP_CTRL);
			snd_soc_component_read(component, DA7219_GAIN_RAMP_CTRL);
		snd_soc_component_write(component, DA7219_GAIN_RAMP_CTRL,
			      DA7219_GAIN_RAMP_RATE_NOMINAL);
		break;
@@ -1930,7 +1930,7 @@ static int da7219_wclk_is_prepared(struct clk_hw *hw)
	if (!da7219->master)
		return -EINVAL;

	clk_reg = snd_soc_component_read32(component, DA7219_DAI_CLK_MODE);
	clk_reg = snd_soc_component_read(component, DA7219_DAI_CLK_MODE);

	return !!(clk_reg & DA7219_DAI_CLK_EN_MASK);
}
@@ -1942,7 +1942,7 @@ static unsigned long da7219_wclk_recalc_rate(struct clk_hw *hw,
		container_of(hw, struct da7219_priv,
			     dai_clks_hw[DA7219_DAI_WCLK_IDX]);
	struct snd_soc_component *component = da7219->component;
	u8 fs = snd_soc_component_read32(component, DA7219_SR);
	u8 fs = snd_soc_component_read(component, DA7219_SR);

	switch (fs & DA7219_SR_MASK) {
	case DA7219_SR_8000:
@@ -2027,7 +2027,7 @@ static unsigned long da7219_bclk_recalc_rate(struct clk_hw *hw,
		container_of(hw, struct da7219_priv,
			     dai_clks_hw[DA7219_DAI_BCLK_IDX]);
	struct snd_soc_component *component = da7219->component;
	u8 bclks_per_wclk = snd_soc_component_read32(component,
	u8 bclks_per_wclk = snd_soc_component_read(component,
						     DA7219_DAI_CLK_MODE);

	switch (bclks_per_wclk & DA7219_DAI_BCLKS_PER_WCLK_MASK) {
Loading