Commit 28cbc3a4 authored Mar 21, 2023 by Cristian Ciocaltea Committed by Greg Kroah-Hartman Mar 29, 2023

ARM: dts: sunxi: h3/h5: Switch dma-names order for snps,dw-apb-uart nodes

Commit 370f696e ("dt-bindings: serial: snps-dw-apb-uart: add dma &
dma-names properties") documented dma-names property to handle Allwinner
D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the
reverse of what a bunch of different boards expect.

The initial proposed solution was to allow a flexible dma-names order in
the binding, due to potential ABI breakage concerns after fixing the DTS
files. But luckily the Allwinner boards are not affected, since they are
using a shared DMA channel for rx and tx.

Hence, the first step in fixing the inconsistency was to change
dma-names order in the binding to tx->rx.

Do the same for the snps,dw-apb-uart nodes in the DTS file.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20230321215624.78383-6-cristian.ciocaltea@collabora.com

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

parent 646a203a

arch/arm/boot/dts/sunxi-h3-h5.dtsi

+4 −4

Original line number	Diff line number	Diff line
		@@ -710,7 +710,7 @@
		clocks = <&ccu CLK_BUS_UART0>;
		resets = <&ccu RST_BUS_UART0>;
		dmas = <&dma 6>, <&dma 6>;
		dma-names = "rx", "tx";
		dma-names = "tx", "rx";
		status = "disabled";
		};

		@@ -723,7 +723,7 @@
		clocks = <&ccu CLK_BUS_UART1>;
		resets = <&ccu RST_BUS_UART1>;
		dmas = <&dma 7>, <&dma 7>;
		dma-names = "rx", "tx";
		dma-names = "tx", "rx";
		status = "disabled";
		};

		@@ -736,7 +736,7 @@
		clocks = <&ccu CLK_BUS_UART2>;
		resets = <&ccu RST_BUS_UART2>;
		dmas = <&dma 8>, <&dma 8>;
		dma-names = "rx", "tx";
		dma-names = "tx", "rx";
		status = "disabled";
		};

		@@ -749,7 +749,7 @@
		clocks = <&ccu CLK_BUS_UART3>;
		resets = <&ccu RST_BUS_UART3>;
		dmas = <&dma 9>, <&dma 9>;
		dma-names = "rx", "tx";
		dma-names = "tx", "rx";
		status = "disabled";
		};