Commit 2867298d authored by Yufeng Mo's avatar Yufeng Mo Committed by David S. Miller
Browse files

net: hns3: fix incorrect configuration for igu_egu_hw_err 



According to the UM, the type and enable status of igu_egu_hw_err
should be configured separately. Currently, the type field is
incorrect when disable this error. So fix it by configuring these
two fields separately.

Fixes: bf1faf94 ("net: hns3: Add enable and process hw errors from IGU, EGU and NCSI")
Signed-off-by: default avatarYufeng Mo <moyufeng@huawei.com>
Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1a70f659

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c

+2 −1
Original line number Diff line number Diff line
@@ -753,8 +753,9 @@ static int hclge_config_igu_egu_hw_err_int(struct hclge_dev *hdev, bool en) 


	/* configure IGU,EGU error interrupts */

	hclge_cmd_setup_basic_desc(&desc, HCLGE_IGU_COMMON_INT_EN, false);

	desc.data[0] = cpu_to_le32(HCLGE_IGU_ERR_INT_TYPE);

	if (en)

		desc.data[0] = cpu_to_le32(HCLGE_IGU_ERR_INT_EN);

		desc.data[0] |= cpu_to_le32(HCLGE_IGU_ERR_INT_EN);



	desc.data[1] = cpu_to_le32(HCLGE_IGU_ERR_INT_EN_MASK);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h

+2 −1
Original line number Diff line number Diff line
@@ -32,7 +32,8 @@ 
#define HCLGE_TQP_ECC_ERR_INT_EN_MASK	0x0FFF

#define HCLGE_MSIX_SRAM_ECC_ERR_INT_EN_MASK	0x0F000000

#define HCLGE_MSIX_SRAM_ECC_ERR_INT_EN	0x0F000000

#define HCLGE_IGU_ERR_INT_EN	0x0000066F

#define HCLGE_IGU_ERR_INT_EN	0x0000000F

#define HCLGE_IGU_ERR_INT_TYPE	0x00000660

#define HCLGE_IGU_ERR_INT_EN_MASK	0x000F

#define HCLGE_IGU_TNL_ERR_INT_EN    0x0002AABF

#define HCLGE_IGU_TNL_ERR_INT_EN_MASK  0x003F