Commit 2848e647 authored by Andrew Victor's avatar Andrew Victor Committed by Russell King
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[ARM] 4289/1: AT91: SAM9260 NAND flash timing 



Fix the NAND flash timings on the AT91SAM9260.

The current timings lead to the detection of a number of bad blocks.
These timings are now set the same as on the AT91SAM9263.

Patch from Nicolas Ferre.

Signed-off-by: default avatarAndrew Victor <andrew@sanpeople.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 190a4408

arch/arm/mach-at91/at91sam9260_devices.c

+4 −4
Original line number Diff line number Diff line
@@ -320,16 +320,16 @@ void __init at91_add_device_nand(struct at91_nand_data *data) 
	at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)

			| AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));



	at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)

			| AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));

	at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)

			| AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));



	at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));

	at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));



	if (data->bus_width_16)

		mode = AT91_SMC_DBW_16;

	else

		mode = AT91_SMC_DBW_8;

	at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));

	at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));



	/* enable pin */

	if (data->enable_pin)