Commit 27e87395 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/trivial' into next 

* pci/trivial:
  PCI: Fix typos and whitespace errors
  PCI: Remove unused "res" variable from pci_resource_io()
  PCI: Correct kernel-doc of pci_vpd_srdt_size(), pci_vpd_srdt_tag()
parents 9198407e 96291d56

CREDITS

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@@ -2090,7 +2090,7 @@ S: Kuala Lumpur, Malaysia 


N: Mohit Kumar

D: ST Microelectronics SPEAr13xx PCI host bridge driver

D: Synopsys Designware PCI host bridge driver

D: Synopsys DesignWare PCI host bridge driver



N: Gabor Kuti

E: seasons@falcon.sch.bme.hu

Documentation/devicetree/bindings/pci/83xx-512x-pci.txt

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* Freescale 83xx and 512x PCI bridges



Freescale 83xx and 512x SOCs include the same pci bridge core.

Freescale 83xx and 512x SOCs include the same PCI bridge core.



83xx/512x specific notes:

- reg: should contain two address length tuples

    The first is for the internal pci bridge registers

    The second is for the pci config space access registers

    The first is for the internal PCI bridge registers

    The second is for the PCI config space access registers



Example (MPC8313ERDB)

	pci0: pci@e0008500 {

Documentation/devicetree/bindings/pci/altera-pcie.txt

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@@ -7,21 +7,21 @@ Required properties: 
		"Txs": TX slave port region

		"Cra": Control register access region

- interrupt-parent:	interrupt source phandle.

- interrupts:	specifies the interrupt source of the parent interrupt controller.

		The format of the interrupt specifier depends on the parent interrupt

		controller.

- interrupts:	specifies the interrupt source of the parent interrupt

		controller.  The format of the interrupt specifier depends

		on the parent interrupt controller.

- device_type:	must be "pci"

- #address-cells:	set to <3>

- #size-cells:		set to <2>

- #interrupt-cells:	set to <1>

- ranges:		describes the translation of addresses for root ports and standard

		PCI regions.

- ranges:	describes the translation of addresses for root ports and

		standard PCI regions.

- interrupt-map-mask and interrupt-map: standard PCI properties to define the

		mapping of the PCIe interface to interrupt numbers.



Optional properties:

- msi-parent:	Link to the hardware entity that serves as the MSI controller for this PCIe

		controller.

- msi-parent:	Link to the hardware entity that serves as the MSI controller

		for this PCIe controller.

- bus-range:	PCI bus numbers covered



Example

Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt

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@@ -6,7 +6,7 @@ and thus inherits all the common properties defined in designware-pcie.txt. 
Required properties:

- compatible: "axis,artpec6-pcie", "snps,dw-pcie"

- reg: base addresses and lengths of the PCIe controller (DBI),

	the phy controller, and configuration address space.

	the PHY controller, and configuration address space.

- reg-names: Must include the following entries:

	- "dbi"

	- "phy"

Documentation/devicetree/bindings/pci/designware-pcie.txt

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* Synopsys Designware PCIe interface

* Synopsys DesignWare PCIe interface



Required properties:

- compatible: should contain "snps,dw-pcie" to identify the core.
@@ -17,29 +17,27 @@ RC mode: 
	properties to define the mapping of the PCIe interface to interrupt

	numbers.

EP mode:

- num-ib-windows: number of inbound address translation

        windows

- num-ob-windows: number of outbound address translation

        windows

- num-ib-windows: number of inbound address translation windows

- num-ob-windows: number of outbound address translation windows



Optional properties:

- num-lanes: number of lanes to use (this property should be specified unless

  the link is brought already up in BIOS)

- reset-gpio: gpio pin number of power good signal

- reset-gpio: GPIO pin number of power good signal

- clocks: Must contain an entry for each entry in clock-names.

	See ../clocks/clock-bindings.txt for details.

- clock-names: Must include the following entries:

	- "pcie"

	- "pcie_bus"

RC mode:

- num-viewport: number of view ports configured in

  hardware. If a platform does not specify it, the driver assumes 2.

- bus-range: PCI bus numbers covered (it is recommended

  for new devicetrees to specify this property, to keep backwards

  compatibility a range of 0x00-0xff is assumed if not present)

- num-viewport: number of view ports configured in hardware. If a platform

  does not specify it, the driver assumes 2.

- bus-range: PCI bus numbers covered (it is recommended for new devicetrees

  to specify this property, to keep backwards compatibility a range of

  0x00-0xff is assumed if not present)



EP mode:

- max-functions: maximum number of functions that can be

  configured

- max-functions: maximum number of functions that can be configured



Example configuration: