Commit 274d842f authored by Benjamin Gray's avatar Benjamin Gray Committed by Michael Ellerman
Browse files

powerpc/tlb: Add local flush for page given mm_struct and psize 



Adds a local TLB flush operation that works given an mm_struct, VA to
flush, and page size representation. Most implementations mirror the
surrounding code. The book3s/32/tlbflush.h implementation is left as
a BUILD_BUG because it is more complicated and not required for
anything as yet.

This removes the need to create a vm_area_struct, which the temporary
patching mm work does not need.

Signed-off-by: default avatarBenjamin Gray <bgray@linux.ibm.com>
Reviewed-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20221109045112.187069-8-bgray@linux.ibm.com
parent d34471c9

arch/powerpc/include/asm/book3s/32/tlbflush.h

+9 −0
Original line number Diff line number Diff line
@@ -2,6 +2,8 @@ 
#ifndef _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H

#define _ASM_POWERPC_BOOK3S_32_TLBFLUSH_H



#include <linux/build_bug.h>



#define MMU_NO_CONTEXT      (0)

/*

 * TLB flushing for "classic" hash-MMU 32-bit CPUs, 6xx, 7xx, 7xxx
@@ -74,6 +76,13 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, 
{

	flush_tlb_page(vma, vmaddr);

}



static inline void local_flush_tlb_page_psize(struct mm_struct *mm,

					      unsigned long vmaddr, int psize)

{

	BUILD_BUG();

}



static inline void local_flush_tlb_mm(struct mm_struct *mm)

{

	flush_tlb_mm(mm);

arch/powerpc/include/asm/book3s/64/tlbflush.h

+7 −0
Original line number Diff line number Diff line
@@ -86,6 +86,13 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, 
		radix__local_flush_tlb_page(vma, vmaddr);

}



static inline void local_flush_tlb_page_psize(struct mm_struct *mm,

					      unsigned long vmaddr, int psize)

{

	if (radix_enabled())

		radix__local_flush_tlb_page_psize(mm, vmaddr, psize);

}



static inline void tlb_flush(struct mmu_gather *tlb)

{

	if (radix_enabled())

arch/powerpc/include/asm/nohash/tlbflush.h

+7 −0
Original line number Diff line number Diff line
@@ -45,6 +45,12 @@ static inline void local_flush_tlb_page(struct vm_area_struct *vma, unsigned lon 
	asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory");

}



static inline void local_flush_tlb_page_psize(struct mm_struct *mm,

					      unsigned long vmaddr, int psize)

{

	asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory");

}



static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)

{

	start &= PAGE_MASK;
@@ -58,6 +64,7 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end 
extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);

extern void local_flush_tlb_mm(struct mm_struct *mm);

extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);

void local_flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmaddr, int psize);



extern void __local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,

				   int tsize, int ind);

arch/powerpc/mm/nohash/tlb.c

+8 −0
Original line number Diff line number Diff line
@@ -184,6 +184,14 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr) 
			       mmu_get_tsize(mmu_virtual_psize), 0);

}

EXPORT_SYMBOL(local_flush_tlb_page);



void local_flush_tlb_page_psize(struct mm_struct *mm,

				unsigned long vmaddr, int psize)

{

	__local_flush_tlb_page(mm, vmaddr, mmu_get_tsize(psize), 0);

}

EXPORT_SYMBOL(local_flush_tlb_page_psize);



#endif



/*