Commit 271ca53c authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Chanwoo Choi
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dt-bindings: devfreq: tegra30-actmon: Convert to schema



Convert NVIDIA Tegra ACTMON binding to schema.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Acked-by: default avatarThierry Reding <treding@nvidia.com>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
parent 1ad4f329
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NVIDIA Tegra Activity Monitor

The activity monitor block collects statistics about the behaviour of other
components in the system. This information can be used to derive the rate at
which the external memory needs to be clocked in order to serve all requests
from the monitored clients.

Required properties:
- compatible: should be "nvidia,tegra<chip>-actmon"
- reg: offset and length of the register set for the device
- interrupts: standard interrupt property
- clocks: Must contain a phandle and clock specifier pair for each entry in
clock-names. See ../../clock/clock-bindings.txt for details.
- clock-names: Must include the following entries:
  - actmon
  - emc
- resets: Must contain an entry for each entry in reset-names. See
../../reset/reset.txt for details.
- reset-names: Must include the following entries:
  - actmon
- operating-points-v2: See ../bindings/opp/opp.txt for details.
- interconnects: Should contain entries for memory clients sitting on
                 MC->EMC memory interconnect path.
- interconnect-names: Should include name of the interconnect path for each
                      interconnect entry. Consult TRM documentation for
                      information about available memory clients, see MEMORY
                      CONTROLLER section.

For each opp entry in 'operating-points-v2' table:
- opp-supported-hw: bitfield indicating SoC speedo ID mask
- opp-peak-kBps: peak bandwidth of the memory channel

Example:
	dfs_opp_table: opp-table {
		compatible = "operating-points-v2";

		opp@12750000 {
			opp-hz = /bits/ 64 <12750000>;
			opp-supported-hw = <0x000F>;
			opp-peak-kBps = <51000>;
		};
		...
	};

	actmon@6000c800 {
		compatible = "nvidia,tegra124-actmon";
		reg = <0x0 0x6000c800 0x0 0x400>;
		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&tegra_car TEGRA124_CLK_ACTMON>,
			 <&tegra_car TEGRA124_CLK_EMC>;
		clock-names = "actmon", "emc";
		resets = <&tegra_car 119>;
		reset-names = "actmon";
		operating-points-v2 = <&dfs_opp_table>;
		interconnects = <&mc TEGRA124_MC_MPCORER &emc>;
		interconnect-names = "cpu";
	};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra30 Activity Monitor

maintainers:
  - Dmitry Osipenko <digetx@gmail.com>
  - Jon Hunter <jonathanh@nvidia.com>
  - Thierry Reding <thierry.reding@gmail.com>

description: |
  The activity monitor block collects statistics about the behaviour of other
  components in the system. This information can be used to derive the rate at
  which the external memory needs to be clocked in order to serve all requests
  from the monitored clients.

properties:
  compatible:
    enum:
      - nvidia,tegra30-actmon
      - nvidia,tegra114-actmon
      - nvidia,tegra124-actmon
      - nvidia,tegra210-actmon

  reg:
    maxItems: 1

  clocks:
    maxItems: 2

  clock-names:
    items:
      - const: actmon
      - const: emc

  resets:
    maxItems: 1

  reset-names:
    items:
      - const: actmon

  interrupts:
    maxItems: 1

  interconnects:
    minItems: 1
    maxItems: 12

  interconnect-names:
    minItems: 1
    maxItems: 12
    description:
      Should include name of the interconnect path for each interconnect
      entry. Consult TRM documentation for information about available
      memory clients, see MEMORY CONTROLLER and ACTIVITY MONITOR sections.

  operating-points-v2:
    description:
      Should contain freqs and voltages and opp-supported-hw property, which
      is a bitfield indicating SoC speedo ID mask.

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - resets
  - reset-names
  - interrupts
  - interconnects
  - interconnect-names
  - operating-points-v2

additionalProperties: false

examples:
  - |
    #include <dt-bindings/memory/tegra30-mc.h>

    mc: memory-controller@7000f000 {
        compatible = "nvidia,tegra30-mc";
        reg = <0x7000f000 0x400>;
        clocks = <&clk 32>;
        clock-names = "mc";

        interrupts = <0 77 4>;

        #iommu-cells = <1>;
        #reset-cells = <1>;
        #interconnect-cells = <1>;
    };

    emc: external-memory-controller@7000f400 {
        compatible = "nvidia,tegra30-emc";
        reg = <0x7000f400 0x400>;
        interrupts = <0 78 4>;
        clocks = <&clk 57>;

        nvidia,memory-controller = <&mc>;
        operating-points-v2 = <&dvfs_opp_table>;
        power-domains = <&domain>;

        #interconnect-cells = <0>;
    };

    actmon@6000c800 {
        compatible = "nvidia,tegra30-actmon";
        reg = <0x6000c800 0x400>;
        interrupts = <0 45 4>;
        clocks = <&clk 119>, <&clk 57>;
        clock-names = "actmon", "emc";
        resets = <&rst 119>;
        reset-names = "actmon";
        operating-points-v2 = <&dvfs_opp_table>;
        interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
        interconnect-names = "cpu-read";
    };