Unverified Commit 26cc239f authored by Mark Brown's avatar Mark Brown
Browse files

ASoC: mediatek: Set i2s clock sharing from machine drivers

Merge series from Nícolas F. R. A. Prado <nfraprado@collabora.com>:

The i2s ports on MediaTek SoCs only support a single data lane. In order
to achieve full-duplex operation thus two i2s ports, one for input and
one for output, need to be used together and sharing a single clock from
one of the ports.

This clock sharing setting was previously read by the sound platform
driver from the devicetree, but given that the input/output pairing is
closely related to which codecs are connected to which ports, the
machine sound driver can infer and set it, so that no DT property is
required.

At this point only mt8183-kukui was using the DT property, but given
that this property was never documented, and that the API introduced in
this series makes it obsolete, the undocumented DT property can safely
be removed.

This series adds a function to allow setting the i2s shared clocks,
makes use of it in the machine drivers as required, and removes the no
longer required DT properties and support for them in the drivers, for
all of mt8192, mt8183 and mt8186.

Nícolas F. R. A. Prado (10):
  ASoC: mediatek: mt8192: Allow setting shared clocks from machine
    driver
  ASoC: mediatek: mt8192-mt6359: Make i2s9 share the clock from i2s8
  ASoC: mediatek: mt8192: Remove clock share parsing from DT
  ASoC: mediatek: mt8183: Allow setting shared clocks from machine
    driver
  ASoC: mediatek: mt8183: Configure shared clocks
  ASoC: mediatek: mt8183: Remove clock share parsing from DT
  arm64: dts: mediatek: kukui: Remove i2s-share properties
  ASoC: mediatek: mt8186: Allow setting shared clocks from machine
    driver
  ASoC: mediatek: mt8186: Configure shared clocks
  ASoC: mediatek: mt8186: Remove clock share parsing from DT

 .../arm64/boot/dts/mediatek/mt8183-kukui.dtsi |  5 --
 sound/soc/mediatek/mt8183/mt8183-afe-common.h |  3 ++
 .../mediatek/mt8183/mt8183-da7219-max98357.c  | 33 +++++++++++++
 sound/soc/mediatek/mt8183/mt8183-dai-i2s.c    | 45 ++++++++---------
 .../mt8183/mt8183-mt6358-ts3a227-max98357.c   | 33 +++++++++++++
 sound/soc/mediatek/mt8186/mt8186-afe-common.h |  3 ++
 sound/soc/mediatek/mt8186/mt8186-dai-i2s.c    | 44 ++++++++---------
 .../mt8186/mt8186-mt6366-da7219-max98357.c    | 18 +++++++
 .../mt8186/mt8186-mt6366-rt1019-rt5682s.c     | 18 +++++++
 sound/soc/mediatek/mt8192/mt8192-afe-common.h |  3 ++
 sound/soc/mediatek/mt8192/mt8192-dai-i2s.c    | 49 ++++++++-----------
 .../mt8192/mt8192-mt6359-rt1015-rt5682.c      |  9 ++++
 12 files changed, 180 insertions(+), 83 deletions(-)

--
2.37.3
parents d2de3f5e 62da80c6
Loading
Loading
Loading
Loading
+0 −5
Original line number Diff line number Diff line
@@ -221,11 +221,6 @@
	};
};

&afe {
	i2s3-share = "I2S2";
	i2s0-share = "I2S5";
};

&auxadc {
	status = "okay";
};
+3 −0
Original line number Diff line number Diff line
@@ -99,6 +99,9 @@ unsigned int mt8183_general_rate_transform(struct device *dev,
unsigned int mt8183_rate_transform(struct device *dev,
				   unsigned int rate, int aud_blk);

int mt8183_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name,
			     const char *secondary_i2s_name);

/* dai register */
int mt8183_dai_adda_register(struct mtk_base_afe *afe);
int mt8183_dai_pcm_register(struct mtk_base_afe *afe);
+33 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@
#include "../../codecs/da7219-aad.h"
#include "../../codecs/da7219.h"
#include "../../codecs/rt1015.h"
#include "../common/mtk-afe-platform-driver.h"
#include "mt8183-afe-common.h"

#define DA7219_CODEC_DAI "da7219-hifi"
@@ -372,6 +373,36 @@ static int mt8183_da7219_max98357_hdmi_init(struct snd_soc_pcm_runtime *rtd)
					  &priv->hdmi_jack, NULL);
}

static int mt8183_bt_init(struct snd_soc_pcm_runtime *rtd)
{
	struct snd_soc_component *cmpnt_afe =
		snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
	int ret;

	ret = mt8183_dai_i2s_set_share(afe, "I2S5", "I2S0");
	if (ret) {
		dev_err(rtd->dev, "Failed to set up shared clocks\n");
		return ret;
	}
	return 0;
}

static int mt8183_da7219_init(struct snd_soc_pcm_runtime *rtd)
{
	struct snd_soc_component *cmpnt_afe =
		snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
	int ret;

	ret = mt8183_dai_i2s_set_share(afe, "I2S2", "I2S3");
	if (ret) {
		dev_err(rtd->dev, "Failed to set up shared clocks\n");
		return ret;
	}
	return 0;
}

static struct snd_soc_dai_link mt8183_da7219_dai_links[] = {
	/* FE */
	{
@@ -500,6 +531,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = {
		.ignore_suspend = 1,
		.be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
		.ops = &mt8183_da7219_i2s_ops,
		.init = &mt8183_da7219_init,
		SND_SOC_DAILINK_REG(i2s2),
	},
	{
@@ -515,6 +547,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = {
		.ignore_suspend = 1,
		.be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
		.ops = &mt8183_mt6358_i2s_ops,
		.init = &mt8183_bt_init,
		SND_SOC_DAILINK_REG(i2s5),
	},
	{
+20 −25
Original line number Diff line number Diff line
@@ -43,7 +43,6 @@ struct mtk_afe_i2s_priv {
	int rate; /* for determine which apll to use */
	int low_jitter_en;

	const char *share_property_name;
	int share_i2s_id;

	int mclk_id;
@@ -977,54 +976,55 @@ static const struct mtk_afe_i2s_priv mt8183_i2s_priv[DAI_I2S_NUM] = {
	[DAI_I2S0] = {
		.id = MT8183_DAI_I2S_0,
		.mclk_id = MT8183_I2S0_MCK,
		.share_property_name = "i2s0-share",
		.share_i2s_id = -1,
	},
	[DAI_I2S1] = {
		.id = MT8183_DAI_I2S_1,
		.mclk_id = MT8183_I2S1_MCK,
		.share_property_name = "i2s1-share",
		.share_i2s_id = -1,
	},
	[DAI_I2S2] = {
		.id = MT8183_DAI_I2S_2,
		.mclk_id = MT8183_I2S2_MCK,
		.share_property_name = "i2s2-share",
		.share_i2s_id = -1,
	},
	[DAI_I2S3] = {
		.id = MT8183_DAI_I2S_3,
		.mclk_id = MT8183_I2S3_MCK,
		.share_property_name = "i2s3-share",
		.share_i2s_id = -1,
	},
	[DAI_I2S5] = {
		.id = MT8183_DAI_I2S_5,
		.mclk_id = MT8183_I2S5_MCK,
		.share_property_name = "i2s5-share",
		.share_i2s_id = -1,
	},
};

static int mt8183_dai_i2s_get_share(struct mtk_base_afe *afe)
/**
 * mt8183_dai_i2s_set_share() - Set up I2S ports to share a single clock.
 * @afe: Pointer to &struct mtk_base_afe
 * @main_i2s_name: The name of the I2S port that will provide the clock
 * @secondary_i2s_name: The name of the I2S port that will use this clock
 */
int mt8183_dai_i2s_set_share(struct mtk_base_afe *afe, const char *main_i2s_name,
			     const char *secondary_i2s_name)
{
	struct mt8183_afe_private *afe_priv = afe->platform_priv;
	const struct device_node *of_node = afe->dev->of_node;
	const char *of_str;
	const char *property_name;
	struct mtk_afe_i2s_priv *i2s_priv;
	int i;
	struct mtk_afe_i2s_priv *secondary_i2s_priv;
	int main_i2s_id;

	for (i = 0; i < DAI_I2S_NUM; i++) {
		i2s_priv = afe_priv->dai_priv[mt8183_i2s_priv[i].id];
		property_name = mt8183_i2s_priv[i].share_property_name;
		if (of_property_read_string(of_node, property_name, &of_str))
			continue;
		i2s_priv->share_i2s_id = get_i2s_id_by_name(afe, of_str);
	}
	secondary_i2s_priv = get_i2s_priv_by_name(afe, secondary_i2s_name);
	if (!secondary_i2s_priv)
		return -EINVAL;

	main_i2s_id = get_i2s_id_by_name(afe, main_i2s_name);
	if (main_i2s_id < 0)
		return main_i2s_id;

	secondary_i2s_priv->share_i2s_id = main_i2s_id;

	return 0;
}
EXPORT_SYMBOL_GPL(mt8183_dai_i2s_set_share);

static int mt8183_dai_i2s_set_priv(struct mtk_base_afe *afe)
{
@@ -1074,10 +1074,5 @@ int mt8183_dai_i2s_register(struct mtk_base_afe *afe)
	if (ret)
		return ret;

	/* parse share i2s */
	ret = mt8183_dai_i2s_get_share(afe);
	if (ret)
		return ret;

	return 0;
}
+33 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@

#include "../../codecs/rt1015.h"
#include "../../codecs/ts3a227e.h"
#include "../common/mtk-afe-platform-driver.h"
#include "mt8183-afe-common.h"

#define RT1015_CODEC_DAI "rt1015-aif"
@@ -391,6 +392,36 @@ mt8183_mt6358_ts3a227_max98357_hdmi_init(struct snd_soc_pcm_runtime *rtd)
					  &priv->hdmi_jack, NULL);
}

static int mt8183_bt_init(struct snd_soc_pcm_runtime *rtd)
{
	struct snd_soc_component *cmpnt_afe =
		snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
	int ret;

	ret = mt8183_dai_i2s_set_share(afe, "I2S5", "I2S0");
	if (ret) {
		dev_err(rtd->dev, "Failed to set up shared clocks\n");
		return ret;
	}
	return 0;
}

static int mt8183_i2s2_init(struct snd_soc_pcm_runtime *rtd)
{
	struct snd_soc_component *cmpnt_afe =
		snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME);
	struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe);
	int ret;

	ret = mt8183_dai_i2s_set_share(afe, "I2S2", "I2S3");
	if (ret) {
		dev_err(rtd->dev, "Failed to set up shared clocks\n");
		return ret;
	}
	return 0;
}

static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = {
	/* FE */
	{
@@ -527,6 +558,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = {
		.ignore_suspend = 1,
		.be_hw_params_fixup = mt8183_i2s_hw_params_fixup,
		.ops = &mt8183_mt6358_i2s_ops,
		.init = &mt8183_i2s2_init,
		SND_SOC_DAILINK_REG(i2s2),
	},
	{
@@ -541,6 +573,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = {
		.dpcm_playback = 1,
		.ignore_suspend = 1,
		.ops = &mt8183_mt6358_i2s_ops,
		.init = &mt8183_bt_init,
		SND_SOC_DAILINK_REG(i2s5),
	},
	{
Loading