Commit 26c95642 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mips-fixes_6.0_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux 

Pull MIPS fixes from Thomas Bogendoerfer:

 - fix missing export for Lantiq watchdog driver

 - fix ethernet phy interface setup for Loongson32

* tag 'mips-fixes_6.0_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
  MIPS: Loongson32: Fix PHY-mode being left unspecified
  MIPS: lantiq: export clk_get_io() for lantiq_wdt.ko
parents 88e6546b e9f3f8f4

arch/mips/lantiq/clk.c

+1 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ struct clk *clk_get_io(void) 
{

	return &cpu_clk_generic[2];

}

EXPORT_SYMBOL_GPL(clk_get_io);



struct clk *clk_get_ppe(void)

{

arch/mips/loongson32/common/platform.c

+8 −8
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv) 
	if (plat_dat->bus_id) {

		__raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |

			     GMAC1_USE_UART0, LS1X_MUX_CTRL0);

		switch (plat_dat->interface) {

		switch (plat_dat->phy_interface) {

		case PHY_INTERFACE_MODE_RGMII:

			val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);

			break;
@@ -107,12 +107,12 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv) 
			break;

		default:

			pr_err("unsupported mii mode %d\n",

			       plat_dat->interface);

			       plat_dat->phy_interface);

			return -ENOTSUPP;

		}

		val &= ~GMAC1_SHUT;

	} else {

		switch (plat_dat->interface) {

		switch (plat_dat->phy_interface) {

		case PHY_INTERFACE_MODE_RGMII:

			val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);

			break;
@@ -121,7 +121,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv) 
			break;

		default:

			pr_err("unsupported mii mode %d\n",

			       plat_dat->interface);

			       plat_dat->phy_interface);

			return -ENOTSUPP;

		}

		val &= ~GMAC0_SHUT;
@@ -131,7 +131,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv) 
	plat_dat = dev_get_platdata(&pdev->dev);



	val &= ~PHY_INTF_SELI;

	if (plat_dat->interface == PHY_INTERFACE_MODE_RMII)

	if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)

		val |= 0x4 << PHY_INTF_SELI_SHIFT;

	__raw_writel(val, LS1X_MUX_CTRL1);
@@ -146,9 +146,9 @@ static struct plat_stmmacenet_data ls1x_eth0_pdata = { 
	.bus_id			= 0,

	.phy_addr		= -1,

#if defined(CONFIG_LOONGSON1_LS1B)

	.interface		= PHY_INTERFACE_MODE_MII,

	.phy_interface		= PHY_INTERFACE_MODE_MII,

#elif defined(CONFIG_LOONGSON1_LS1C)

	.interface		= PHY_INTERFACE_MODE_RMII,

	.phy_interface		= PHY_INTERFACE_MODE_RMII,

#endif

	.mdio_bus_data		= &ls1x_mdio_bus_data,

	.dma_cfg		= &ls1x_eth_dma_cfg,
@@ -186,7 +186,7 @@ struct platform_device ls1x_eth0_pdev = { 
static struct plat_stmmacenet_data ls1x_eth1_pdata = {

	.bus_id			= 1,

	.phy_addr		= -1,

	.interface		= PHY_INTERFACE_MODE_MII,

	.phy_interface		= PHY_INTERFACE_MODE_MII,

	.mdio_bus_data		= &ls1x_mdio_bus_data,

	.dma_cfg		= &ls1x_eth_dma_cfg,

	.has_gmac		= 1,