Loading Documentation/devicetree/bindings/dma/shdma.txt +35 −26 Original line number Diff line number Diff line Loading @@ -22,42 +22,51 @@ Optional properties (currently unused): * DMA controller Required properties: - compatible: should be "renesas,shdma" - compatible: should be of the form "renesas,shdma-<soc>", where <soc> should be replaced with the desired SoC model, e.g. "renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC Example: dmac: dma-mux0 { dmac: dma-multiplexer@0 { compatible = "renesas,shdma-mux"; #dma-cells = <1>; dma-channels = <6>; dma-channels = <20>; dma-requests = <256>; reg = <0 0>; /* Needed for AUXDATA */ #address-cells = <1>; #size-cells = <1>; #address-cells = <2>; #size-cells = <2>; ranges; dma0: shdma@fe008020 { compatible = "renesas,shdma"; reg = <0xfe008020 0x270>, <0xfe009000 0xc>; dma0: dma-controller@e6700020 { compatible = "renesas,shdma-r8a73a4"; reg = <0 0xe6700020 0 0x89e0>; interrupt-parent = <&gic>; interrupts = <0 34 4 0 28 4 0 29 4 0 30 4 0 31 4 0 32 4 0 33 4>; interrupts = <0 220 4 0 200 4 0 201 4 0 202 4 0 203 4 0 204 4 0 205 4 0 206 4 0 207 4 0 208 4 0 209 4 0 210 4 0 211 4 0 212 4 0 213 4 0 214 4 0 215 4 0 216 4 0 217 4 0 218 4 0 219 4>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5"; }; dma1: shdma@fe018020 { ... }; dma2: shdma@fe028020 { ... "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19"; }; }; Loading drivers/dma/sh/Kconfig +4 −0 Original line number Diff line number Diff line Loading @@ -28,3 +28,7 @@ config RCAR_HPB_DMAE depends on SH_DMAE_BASE help Enable support for the Renesas R-Car series DMA controllers. config SHDMA_R8A73A4 def_bool y depends on ARCH_R8A73A4 && SH_DMAE != n drivers/dma/sh/Makefile +5 −0 Original line number Diff line number Diff line obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o shdma-of.o obj-$(CONFIG_SH_DMAE) += shdma.o shdma-y := shdmac.o ifeq ($(CONFIG_OF),y) shdma-$(CONFIG_SHDMA_R8A73A4) += shdma-r8a73a4.o endif shdma-objs := $(shdma-y) obj-$(CONFIG_SUDMAC) += sudmac.o obj-$(CONFIG_RCAR_HPB_DMAE) += rcar-hpbdma.o drivers/dma/sh/shdma-arm.h 0 → 100644 +51 −0 Original line number Diff line number Diff line /* * Renesas SuperH DMA Engine support * * Copyright (C) 2013 Renesas Electronics, Inc. * * This is free software; you can redistribute it and/or modify it under the * terms of version 2 the GNU General Public License as published by the Free * Software Foundation. */ #ifndef SHDMA_ARM_H #define SHDMA_ARM_H #include "shdma.h" /* Transmit sizes and respective CHCR register values */ enum { XMIT_SZ_8BIT = 0, XMIT_SZ_16BIT = 1, XMIT_SZ_32BIT = 2, XMIT_SZ_64BIT = 7, XMIT_SZ_128BIT = 3, XMIT_SZ_256BIT = 4, XMIT_SZ_512BIT = 5, }; /* log2(size / 8) - used to calculate number of transfers */ #define SH_DMAE_TS_SHIFT { \ [XMIT_SZ_8BIT] = 0, \ [XMIT_SZ_16BIT] = 1, \ [XMIT_SZ_32BIT] = 2, \ [XMIT_SZ_64BIT] = 3, \ [XMIT_SZ_128BIT] = 4, \ [XMIT_SZ_256BIT] = 5, \ [XMIT_SZ_512BIT] = 6, \ } #define TS_LOW_BIT 0x3 /* --xx */ #define TS_HI_BIT 0xc /* xx-- */ #define TS_LOW_SHIFT (3) #define TS_HI_SHIFT (20 - 2) /* 2 bits for shifted low TS */ #define TS_INDEX2VAL(i) \ ((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\ (((i) & TS_HI_BIT) << TS_HI_SHIFT)) #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz))) #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz))) #endif drivers/dma/sh/shdma-base.c +11 −15 Original line number Diff line number Diff line Loading @@ -171,7 +171,8 @@ static struct shdma_desc *shdma_get_desc(struct shdma_chan *schan) return NULL; } static int shdma_setup_slave(struct shdma_chan *schan, int slave_id) static int shdma_setup_slave(struct shdma_chan *schan, int slave_id, dma_addr_t slave_addr) { struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device); const struct shdma_ops *ops = sdev->ops; Loading @@ -179,7 +180,7 @@ static int shdma_setup_slave(struct shdma_chan *schan, int slave_id) if (schan->dev->of_node) { match = schan->hw_req; ret = ops->set_slave(schan, match, true); ret = ops->set_slave(schan, match, slave_addr, true); if (ret < 0) return ret; Loading @@ -194,7 +195,7 @@ static int shdma_setup_slave(struct shdma_chan *schan, int slave_id) if (test_and_set_bit(slave_id, shdma_slave_used)) return -EBUSY; ret = ops->set_slave(schan, match, false); ret = ops->set_slave(schan, match, slave_addr, false); if (ret < 0) { clear_bit(slave_id, shdma_slave_used); return ret; Loading Loading @@ -236,7 +237,7 @@ bool shdma_chan_filter(struct dma_chan *chan, void *arg) if (!schan->dev->of_node && match >= slave_num) return false; ret = ops->set_slave(schan, match, true); ret = ops->set_slave(schan, match, 0, true); if (ret < 0) return false; Loading @@ -259,7 +260,7 @@ static int shdma_alloc_chan_resources(struct dma_chan *chan) */ if (slave) { /* Legacy mode: .private is set in filter */ ret = shdma_setup_slave(schan, slave->slave_id); ret = shdma_setup_slave(schan, slave->slave_id, 0); if (ret < 0) goto esetslave; } else { Loading Loading @@ -680,7 +681,9 @@ static int shdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, * channel, while using it... */ config = (struct dma_slave_config *)arg; ret = shdma_setup_slave(schan, config->slave_id); ret = shdma_setup_slave(schan, config->slave_id, config->direction == DMA_DEV_TO_MEM ? config->src_addr : config->dst_addr); if (ret < 0) return ret; break; Loading Loading @@ -831,8 +834,8 @@ static irqreturn_t chan_irqt(int irq, void *dev) int shdma_request_irq(struct shdma_chan *schan, int irq, unsigned long flags, const char *name) { int ret = request_threaded_irq(irq, chan_irq, chan_irqt, flags, name, schan); int ret = devm_request_threaded_irq(schan->dev, irq, chan_irq, chan_irqt, flags, name, schan); schan->irq = ret < 0 ? ret : irq; Loading @@ -840,13 +843,6 @@ int shdma_request_irq(struct shdma_chan *schan, int irq, } EXPORT_SYMBOL(shdma_request_irq); void shdma_free_irq(struct shdma_chan *schan) { if (schan->irq >= 0) free_irq(schan->irq, schan); } EXPORT_SYMBOL(shdma_free_irq); void shdma_chan_probe(struct shdma_dev *sdev, struct shdma_chan *schan, int id) { Loading Loading
Documentation/devicetree/bindings/dma/shdma.txt +35 −26 Original line number Diff line number Diff line Loading @@ -22,42 +22,51 @@ Optional properties (currently unused): * DMA controller Required properties: - compatible: should be "renesas,shdma" - compatible: should be of the form "renesas,shdma-<soc>", where <soc> should be replaced with the desired SoC model, e.g. "renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC Example: dmac: dma-mux0 { dmac: dma-multiplexer@0 { compatible = "renesas,shdma-mux"; #dma-cells = <1>; dma-channels = <6>; dma-channels = <20>; dma-requests = <256>; reg = <0 0>; /* Needed for AUXDATA */ #address-cells = <1>; #size-cells = <1>; #address-cells = <2>; #size-cells = <2>; ranges; dma0: shdma@fe008020 { compatible = "renesas,shdma"; reg = <0xfe008020 0x270>, <0xfe009000 0xc>; dma0: dma-controller@e6700020 { compatible = "renesas,shdma-r8a73a4"; reg = <0 0xe6700020 0 0x89e0>; interrupt-parent = <&gic>; interrupts = <0 34 4 0 28 4 0 29 4 0 30 4 0 31 4 0 32 4 0 33 4>; interrupts = <0 220 4 0 200 4 0 201 4 0 202 4 0 203 4 0 204 4 0 205 4 0 206 4 0 207 4 0 208 4 0 209 4 0 210 4 0 211 4 0 212 4 0 213 4 0 214 4 0 215 4 0 216 4 0 217 4 0 218 4 0 219 4>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5"; }; dma1: shdma@fe018020 { ... }; dma2: shdma@fe028020 { ... "ch4", "ch5", "ch6", "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", "ch19"; }; }; Loading
drivers/dma/sh/Kconfig +4 −0 Original line number Diff line number Diff line Loading @@ -28,3 +28,7 @@ config RCAR_HPB_DMAE depends on SH_DMAE_BASE help Enable support for the Renesas R-Car series DMA controllers. config SHDMA_R8A73A4 def_bool y depends on ARCH_R8A73A4 && SH_DMAE != n
drivers/dma/sh/Makefile +5 −0 Original line number Diff line number Diff line obj-$(CONFIG_SH_DMAE_BASE) += shdma-base.o shdma-of.o obj-$(CONFIG_SH_DMAE) += shdma.o shdma-y := shdmac.o ifeq ($(CONFIG_OF),y) shdma-$(CONFIG_SHDMA_R8A73A4) += shdma-r8a73a4.o endif shdma-objs := $(shdma-y) obj-$(CONFIG_SUDMAC) += sudmac.o obj-$(CONFIG_RCAR_HPB_DMAE) += rcar-hpbdma.o
drivers/dma/sh/shdma-arm.h 0 → 100644 +51 −0 Original line number Diff line number Diff line /* * Renesas SuperH DMA Engine support * * Copyright (C) 2013 Renesas Electronics, Inc. * * This is free software; you can redistribute it and/or modify it under the * terms of version 2 the GNU General Public License as published by the Free * Software Foundation. */ #ifndef SHDMA_ARM_H #define SHDMA_ARM_H #include "shdma.h" /* Transmit sizes and respective CHCR register values */ enum { XMIT_SZ_8BIT = 0, XMIT_SZ_16BIT = 1, XMIT_SZ_32BIT = 2, XMIT_SZ_64BIT = 7, XMIT_SZ_128BIT = 3, XMIT_SZ_256BIT = 4, XMIT_SZ_512BIT = 5, }; /* log2(size / 8) - used to calculate number of transfers */ #define SH_DMAE_TS_SHIFT { \ [XMIT_SZ_8BIT] = 0, \ [XMIT_SZ_16BIT] = 1, \ [XMIT_SZ_32BIT] = 2, \ [XMIT_SZ_64BIT] = 3, \ [XMIT_SZ_128BIT] = 4, \ [XMIT_SZ_256BIT] = 5, \ [XMIT_SZ_512BIT] = 6, \ } #define TS_LOW_BIT 0x3 /* --xx */ #define TS_HI_BIT 0xc /* xx-- */ #define TS_LOW_SHIFT (3) #define TS_HI_SHIFT (20 - 2) /* 2 bits for shifted low TS */ #define TS_INDEX2VAL(i) \ ((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\ (((i) & TS_HI_BIT) << TS_HI_SHIFT)) #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | 0x800 | TS_INDEX2VAL((xmit_sz))) #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | 0x800 | TS_INDEX2VAL((xmit_sz))) #endif
drivers/dma/sh/shdma-base.c +11 −15 Original line number Diff line number Diff line Loading @@ -171,7 +171,8 @@ static struct shdma_desc *shdma_get_desc(struct shdma_chan *schan) return NULL; } static int shdma_setup_slave(struct shdma_chan *schan, int slave_id) static int shdma_setup_slave(struct shdma_chan *schan, int slave_id, dma_addr_t slave_addr) { struct shdma_dev *sdev = to_shdma_dev(schan->dma_chan.device); const struct shdma_ops *ops = sdev->ops; Loading @@ -179,7 +180,7 @@ static int shdma_setup_slave(struct shdma_chan *schan, int slave_id) if (schan->dev->of_node) { match = schan->hw_req; ret = ops->set_slave(schan, match, true); ret = ops->set_slave(schan, match, slave_addr, true); if (ret < 0) return ret; Loading @@ -194,7 +195,7 @@ static int shdma_setup_slave(struct shdma_chan *schan, int slave_id) if (test_and_set_bit(slave_id, shdma_slave_used)) return -EBUSY; ret = ops->set_slave(schan, match, false); ret = ops->set_slave(schan, match, slave_addr, false); if (ret < 0) { clear_bit(slave_id, shdma_slave_used); return ret; Loading Loading @@ -236,7 +237,7 @@ bool shdma_chan_filter(struct dma_chan *chan, void *arg) if (!schan->dev->of_node && match >= slave_num) return false; ret = ops->set_slave(schan, match, true); ret = ops->set_slave(schan, match, 0, true); if (ret < 0) return false; Loading @@ -259,7 +260,7 @@ static int shdma_alloc_chan_resources(struct dma_chan *chan) */ if (slave) { /* Legacy mode: .private is set in filter */ ret = shdma_setup_slave(schan, slave->slave_id); ret = shdma_setup_slave(schan, slave->slave_id, 0); if (ret < 0) goto esetslave; } else { Loading Loading @@ -680,7 +681,9 @@ static int shdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, * channel, while using it... */ config = (struct dma_slave_config *)arg; ret = shdma_setup_slave(schan, config->slave_id); ret = shdma_setup_slave(schan, config->slave_id, config->direction == DMA_DEV_TO_MEM ? config->src_addr : config->dst_addr); if (ret < 0) return ret; break; Loading Loading @@ -831,8 +834,8 @@ static irqreturn_t chan_irqt(int irq, void *dev) int shdma_request_irq(struct shdma_chan *schan, int irq, unsigned long flags, const char *name) { int ret = request_threaded_irq(irq, chan_irq, chan_irqt, flags, name, schan); int ret = devm_request_threaded_irq(schan->dev, irq, chan_irq, chan_irqt, flags, name, schan); schan->irq = ret < 0 ? ret : irq; Loading @@ -840,13 +843,6 @@ int shdma_request_irq(struct shdma_chan *schan, int irq, } EXPORT_SYMBOL(shdma_request_irq); void shdma_free_irq(struct shdma_chan *schan) { if (schan->irq >= 0) free_irq(schan->irq, schan); } EXPORT_SYMBOL(shdma_free_irq); void shdma_chan_probe(struct shdma_dev *sdev, struct shdma_chan *schan, int id) { Loading