Commit 25d31698 authored by Martin Blumenstingl's avatar Martin Blumenstingl Committed by Jerome Brunet
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dt-bindings: clock: meson8b: add the clock inputs 



The clock controller on Meson8/Meson8b/Meson8m2 has three (known)
inputs:
- "xtal": the main 24MHz crystal
- "ddr_pll": some of the audio clocks use the output of the DDR PLL as
  input
- "clk_32k": an optional clock signal which can be connected to GPIOAO_6
  (which then has to be switched to the CLK_32K_IN function)

Add the inputs to the documentation so we can wire up these inputs in a
follow-up patch.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent 51b6fe7e

Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt

+5 −0
Original line number Original line Diff line number Diff line
@@ -11,6 +11,11 @@ Required Properties: 
	- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs

	- "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs

- #clock-cells: should be 1.

- #clock-cells: should be 1.

- #reset-cells: should be 1.

- #reset-cells: should be 1.

- clocks: list of clock phandles, one for each entry in clock-names

- clock-names: should contain the following:

  * "xtal": the 24MHz system oscillator

  * "ddr_pll": the DDR PLL clock

  * "clk_32k": (if present) the 32kHz clock signal from GPIOAO_6 (CLK_32K_IN)





Parent node should have the following properties :

Parent node should have the following properties :

- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"

- compatible: "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"