Commit 259149cf authored by Christophe Leroy's avatar Christophe Leroy Committed by Michael Ellerman
Browse files

powerpc/32s: Only build hash code when CONFIG_PPC_BOOK3S_604 is selected 



It is now possible to only build book3s/32 kernel for
CPUs without hash table.

Opt out hash related code when CONFIG_PPC_BOOK3S_604 is not selected.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/62df436454ef06e104cc334a0859a2878d7888d5.1608274548.git.christophe.leroy@csgroup.eu
parent 675b963e

arch/powerpc/kernel/head_book3s_32.S

+12 −0
Original line number Diff line number Diff line
@@ -286,6 +286,7 @@ MachineCheck: 
	DO_KVM  0x300

DataAccess:

#ifdef CONFIG_VMAP_STACK

#ifdef CONFIG_PPC_BOOK3S_604

BEGIN_MMU_FTR_SECTION

	mtspr	SPRN_SPRG_SCRATCH2,r10

	mfspr	r10, SPRN_SPRG_THREAD
@@ -302,12 +303,14 @@ BEGIN_MMU_FTR_SECTION 
MMU_FTR_SECTION_ELSE

	b	1f

ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)

#endif

1:	EXCEPTION_PROLOG_0 handle_dar_dsisr=1

	EXCEPTION_PROLOG_1

	b	handle_page_fault_tramp_1

#else	/* CONFIG_VMAP_STACK */

	EXCEPTION_PROLOG handle_dar_dsisr=1

	get_and_save_dar_dsisr_on_stack	r4, r5, r11

#ifdef CONFIG_PPC_BOOK3S_604

BEGIN_MMU_FTR_SECTION

	andis.	r0, r5, (DSISR_BAD_FAULT_32S | DSISR_DABRMATCH)@h

	bne	handle_page_fault_tramp_2	/* if not, try to put a PTE */
@@ -315,8 +318,11 @@ BEGIN_MMU_FTR_SECTION 
	bl	hash_page

	b	handle_page_fault_tramp_1

MMU_FTR_SECTION_ELSE

#endif

	b	handle_page_fault_tramp_2

#ifdef CONFIG_PPC_BOOK3S_604

ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_HPTE_TABLE)

#endif

#endif	/* CONFIG_VMAP_STACK */



/* Instruction access exception. */
@@ -332,12 +338,14 @@ InstructionAccess: 
	mfspr	r11, SPRN_SRR1		/* check whether user or kernel */

	stw	r11, SRR1(r10)

	mfcr	r10

#ifdef CONFIG_PPC_BOOK3S_604

BEGIN_MMU_FTR_SECTION

	andis.	r11, r11, SRR1_ISI_NOPT@h	/* no pte found? */

	bne	hash_page_isi

.Lhash_page_isi_cont:

	mfspr	r11, SPRN_SRR1		/* check whether user or kernel */

END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)

#endif

	andi.	r11, r11, MSR_PR



	EXCEPTION_PROLOG_1
@@ -348,9 +356,11 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE) 
	beq	1f			/* if so, try to put a PTE */

	li	r3,0			/* into the hash table */

	mr	r4,r12			/* SRR0 is fault address */

#ifdef CONFIG_PPC_BOOK3S_604

BEGIN_MMU_FTR_SECTION

	bl	hash_page

END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE)

#endif

#endif	/* CONFIG_VMAP_STACK */

1:	mr	r4,r12

	andis.	r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */
@@ -683,6 +693,7 @@ handle_page_fault_tramp_2: 
	EXC_XFER_LITE(0x300, handle_page_fault)



#ifdef CONFIG_VMAP_STACK

#ifdef CONFIG_PPC_BOOK3S_604

.macro save_regs_thread		thread

	stw	r0, THR0(\thread)

	stw	r3, THR3(\thread)
@@ -754,6 +765,7 @@ fast_hash_page_return: 
	mfspr	r11, SPRN_SPRG_SCRATCH1

	mfspr	r10, SPRN_SPRG_SCRATCH0

	rfi

#endif /* CONFIG_PPC_BOOK3S_604 */



stack_overflow:

	vmap_stack_overflow_exception

arch/powerpc/mm/book3s32/Makefile

+3 −1
Original line number Diff line number Diff line
@@ -6,4 +6,6 @@ ifdef CONFIG_KASAN 
CFLAGS_mmu.o  		+= -DDISABLE_BRANCH_PROFILING

endif



obj-y += mmu.o hash_low.o mmu_context.o tlb.o nohash_low.o
 
obj-y += mmu.o mmu_context.o

obj-$(CONFIG_PPC_BOOK3S_603) += nohash_low.o

obj-$(CONFIG_PPC_BOOK3S_604) += hash_low.o tlb.o