Unverified Commit 255b34d7 authored by Yangyu Chen's avatar Yangyu Chen Committed by Palmer Dabbelt
Browse files

riscv: allow case-insensitive ISA string parsing 



According to RISC-V Hart Capabilities Table (RHCT) description in UEFI
Forum ECR, the format of the ISA string is defined in the RISC-V
unprivileged specification which is case-insensitive. However, the
current ISA string parser in the kernel does not support ISA strings
with uppercase letters.

This patch modifies the ISA string parser in the kernel to support
case-insensitive ISA string parsing.

Reviewed-by: default avatarAndrew Jones <ajones@ventanamicro.com>
Reviewed-by: default avatarConor Dooley <conor.dooley@microchip.com>
Signed-off-by: default avatarYangyu Chen <cyy@cyyself.name>
Link: https://lore.kernel.org/r/tencent_B30EED51C7235CA1988890E5C658BE35C107@qq.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent ac9a7868

arch/riscv/kernel/cpu.c

+2 −1
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ 
 */



#include <linux/cpu.h>

#include <linux/ctype.h>

#include <linux/init.h>

#include <linux/seq_file.h>

#include <linux/of.h>
@@ -42,7 +43,7 @@ int riscv_of_processor_hartid(struct device_node *node, unsigned long *hart) 
		pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);

		return -ENODEV;

	}

	if (isa[0] != 'r' || isa[1] != 'v') {

	if (tolower(isa[0]) != 'r' || tolower(isa[1]) != 'v') {

		pr_warn("CPU with hartid=%lu has an invalid ISA of \"%s\"\n", *hart, isa);

		return -ENODEV;

	}

arch/riscv/kernel/cpufeature.c

+17 −18
Original line number Diff line number Diff line
@@ -127,13 +127,10 @@ void __init riscv_fill_hwcap(void) 
		}



		temp = isa;

#if IS_ENABLED(CONFIG_32BIT)

		if (!strncmp(isa, "rv32", 4))

		if (IS_ENABLED(CONFIG_32BIT) && !strncasecmp(isa, "rv32", 4))

			isa += 4;

#elif IS_ENABLED(CONFIG_64BIT)

		if (!strncmp(isa, "rv64", 4))

		else if (IS_ENABLED(CONFIG_64BIT) && !strncasecmp(isa, "rv64", 4))

			isa += 4;

#endif

		/* The riscv,isa DT property must start with rv64 or rv32 */

		if (temp == isa)

			continue;
@@ -157,13 +154,15 @@ void __init riscv_fill_hwcap(void) 
					break;

				}

				fallthrough;

			case 'S':

			case 'x':

			case 'X':

			case 'z':

			case 'Z':

				ext_long = true;

				/* Multi-letter extension must be delimited */

				for (; *isa && *isa != '_'; ++isa)

					if (unlikely(!islower(*isa)

						     && !isdigit(*isa)))

					if (unlikely(!isalnum(*isa)))

						ext_err = true;

				/* Parse backwards */

				ext_end = isa;
@@ -174,7 +173,7 @@ void __init riscv_fill_hwcap(void) 
				/* Skip the minor version */

				while (isdigit(*--ext_end))

					;

				if (ext_end[0] != 'p'

				if (tolower(ext_end[0]) != 'p'

				    || !isdigit(ext_end[-1])) {

					/* Advance it to offset the pre-decrement */

					++ext_end;
@@ -186,7 +185,7 @@ void __init riscv_fill_hwcap(void) 
				++ext_end;

				break;

			default:

				if (unlikely(!islower(*ext))) {

				if (unlikely(!isalpha(*ext))) {

					ext_err = true;

					break;

				}
@@ -196,7 +195,7 @@ void __init riscv_fill_hwcap(void) 
				/* Skip the minor version */

				while (isdigit(*++isa))

					;

				if (*isa != 'p')

				if (tolower(*isa) != 'p')

					break;

				if (!isdigit(*++isa)) {

					--isa;
@@ -213,7 +212,7 @@ void __init riscv_fill_hwcap(void) 
#define SET_ISA_EXT_MAP(name, bit)							\

			do {								\

				if ((ext_end - ext == sizeof(name) - 1) &&		\

				     !memcmp(ext, name, sizeof(name) - 1) &&	\

				     !strncasecmp(ext, name, sizeof(name) - 1) &&	\

				     riscv_isa_extension_check(bit))			\

					set_bit(bit, this_isa);				\

			} while (false)							\
@@ -221,7 +220,7 @@ void __init riscv_fill_hwcap(void) 
			if (unlikely(ext_err))

				continue;

			if (!ext_long) {

				int nr = *ext - 'a';

				int nr = tolower(*ext) - 'a';



				if (riscv_isa_extension_check(nr)) {

					this_hwcap |= isa2hwcap[nr];