Commit 253d091c authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'sparx5-phylink' 



Russell King says:

====================
net: sparx5: phylink validate implementation updates

This series converts sparx5 to fill in the supported_interfaces member
of phylink_config, cleans up the validate() implementation, and then
converts to phylink_generic_validate().
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents d3a41000 319faa90

drivers/net/ethernet/microchip/sparx5/sparx5_main.c

+27 −0
Original line number Diff line number Diff line
@@ -292,6 +292,33 @@ static int sparx5_create_port(struct sparx5 *sparx5, 
	spx5_port->phylink_config.dev = &spx5_port->ndev->dev;

	spx5_port->phylink_config.type = PHYLINK_NETDEV;

	spx5_port->phylink_config.pcs_poll = true;

	spx5_port->phylink_config.mac_capabilities = MAC_ASYM_PAUSE |

		MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD |

		MAC_2500FD | MAC_5000FD | MAC_10000FD | MAC_25000FD;



	__set_bit(PHY_INTERFACE_MODE_SGMII,

		  spx5_port->phylink_config.supported_interfaces);

	__set_bit(PHY_INTERFACE_MODE_QSGMII,

		  spx5_port->phylink_config.supported_interfaces);

	__set_bit(PHY_INTERFACE_MODE_1000BASEX,

		  spx5_port->phylink_config.supported_interfaces);

	__set_bit(PHY_INTERFACE_MODE_2500BASEX,

		  spx5_port->phylink_config.supported_interfaces);



	if (spx5_port->conf.bandwidth == SPEED_5000 ||

	    spx5_port->conf.bandwidth == SPEED_10000 ||

	    spx5_port->conf.bandwidth == SPEED_25000)

		__set_bit(PHY_INTERFACE_MODE_5GBASER,

			  spx5_port->phylink_config.supported_interfaces);



	if (spx5_port->conf.bandwidth == SPEED_10000 ||

	    spx5_port->conf.bandwidth == SPEED_25000)

		__set_bit(PHY_INTERFACE_MODE_10GBASER,

			  spx5_port->phylink_config.supported_interfaces);



	if (spx5_port->conf.bandwidth == SPEED_25000)

		__set_bit(PHY_INTERFACE_MODE_25GBASER,

			  spx5_port->phylink_config.supported_interfaces);



	phylink = phylink_create(&spx5_port->phylink_config,

				 of_fwnode_handle(config->node),

drivers/net/ethernet/microchip/sparx5/sparx5_phylink.c

+1 −74
Original line number Diff line number Diff line
@@ -26,79 +26,6 @@ static bool port_conf_has_changed(struct sparx5_port_config *a, struct sparx5_po 
	return false;

}



static void sparx5_phylink_validate(struct phylink_config *config,

				    unsigned long *supported,

				    struct phylink_link_state *state)

{

	struct sparx5_port *port = netdev_priv(to_net_dev(config->dev));

	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };



	phylink_set(mask, Autoneg);

	phylink_set_port_modes(mask);

	phylink_set(mask, Pause);

	phylink_set(mask, Asym_Pause);



	switch (state->interface) {

	case PHY_INTERFACE_MODE_5GBASER:

	case PHY_INTERFACE_MODE_10GBASER:

	case PHY_INTERFACE_MODE_25GBASER:

	case PHY_INTERFACE_MODE_NA:

		if (port->conf.bandwidth == SPEED_5000)

			phylink_set(mask, 5000baseT_Full);

		if (port->conf.bandwidth == SPEED_10000) {

			phylink_set(mask, 5000baseT_Full);

			phylink_set(mask, 10000baseT_Full);

			phylink_set(mask, 10000baseCR_Full);

			phylink_set(mask, 10000baseSR_Full);

			phylink_set(mask, 10000baseLR_Full);

			phylink_set(mask, 10000baseLRM_Full);

			phylink_set(mask, 10000baseER_Full);

		}

		if (port->conf.bandwidth == SPEED_25000) {

			phylink_set(mask, 5000baseT_Full);

			phylink_set(mask, 10000baseT_Full);

			phylink_set(mask, 10000baseCR_Full);

			phylink_set(mask, 10000baseSR_Full);

			phylink_set(mask, 10000baseLR_Full);

			phylink_set(mask, 10000baseLRM_Full);

			phylink_set(mask, 10000baseER_Full);

			phylink_set(mask, 25000baseCR_Full);

			phylink_set(mask, 25000baseSR_Full);

		}

		if (state->interface != PHY_INTERFACE_MODE_NA)

			break;

		fallthrough;

	case PHY_INTERFACE_MODE_SGMII:

	case PHY_INTERFACE_MODE_QSGMII:

		phylink_set(mask, 10baseT_Half);

		phylink_set(mask, 10baseT_Full);

		phylink_set(mask, 100baseT_Half);

		phylink_set(mask, 100baseT_Full);

		phylink_set(mask, 1000baseT_Full);

		phylink_set(mask, 1000baseX_Full);

		if (state->interface != PHY_INTERFACE_MODE_NA)

			break;

		fallthrough;

	case PHY_INTERFACE_MODE_1000BASEX:

	case PHY_INTERFACE_MODE_2500BASEX:

		if (state->interface != PHY_INTERFACE_MODE_2500BASEX) {

			phylink_set(mask, 1000baseT_Full);

			phylink_set(mask, 1000baseX_Full);

		}

		if (state->interface == PHY_INTERFACE_MODE_2500BASEX ||

		    state->interface == PHY_INTERFACE_MODE_NA) {

			phylink_set(mask, 2500baseT_Full);

			phylink_set(mask, 2500baseX_Full);

		}

		break;

	default:

		linkmode_zero(supported);

		return;

	}

	linkmode_and(supported, supported, mask);

	linkmode_and(state->advertising, state->advertising, mask);

}



static void sparx5_phylink_mac_config(struct phylink_config *config,

				      unsigned int mode,

				      const struct phylink_link_state *state)
@@ -202,7 +129,7 @@ const struct phylink_pcs_ops sparx5_phylink_pcs_ops = { 
};



const struct phylink_mac_ops sparx5_phylink_mac_ops = {

	.validate = sparx5_phylink_validate,

	.validate = phylink_generic_validate,

	.mac_config = sparx5_phylink_mac_config,

	.mac_link_down = sparx5_phylink_mac_link_down,

	.mac_link_up = sparx5_phylink_mac_link_up,