Commit 24f67d82 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2021-10-01' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Daniel Vetter:
 "Dave is out on a long w/e, should be back next week.

  Nothing nefarious, just a bunch of driver fixes: amdgpu, i915, tegra,
  and one exynos driver fix"

* tag 'drm-fixes-2021-10-01' of git://anongit.freedesktop.org/drm/drm:
  drm/amdgpu: force exit gfxoff on sdma resume for rmb s0ix
  drm/amdgpu: check tiling flags when creating FB on GFX8-
  drm/amd/display: Pass PCI deviceid into DC
  drm/amd/display: initialize backlight_ramping_override to false
  drm/amdgpu: correct initial cp_hqd_quantum for gfx9
  drm/amd/display: Fix Display Flicker on embedded panels
  drm/amdgpu: fix gart.bo pin_count leak
  drm/i915: Remove warning from the rps worker
  drm/i915/request: fix early tracepoints
  drm/i915/guc, docs: Fix pdfdocs build error by removing nested grid
  gpu: host1x: Plug potential memory leak
  gpu/host1x: fence: Make spinlock static
  drm/tegra: uapi: Fix wrong mapping end address in case of disabled IOMMU
  drm/tegra: dc: Remove unused variables
  drm/exynos: Make use of the helper function devm_platform_ioremap_resource()
  drm/i915/gvt: fix the usage of ww lock in gvt scheduler.
parents 89e50359 78ea8141

drivers/gpu/drm/amd/amdgpu/amdgpu_display.c

+31 −0
Original line number Diff line number Diff line
@@ -837,6 +837,28 @@ static int convert_tiling_flags_to_modifier(struct amdgpu_framebuffer *afb) 
	return 0;

}



/* Mirrors the is_displayable check in radeonsi's gfx6_compute_surface */

static int check_tiling_flags_gfx6(struct amdgpu_framebuffer *afb)

{

	u64 micro_tile_mode;



	/* Zero swizzle mode means linear */

	if (AMDGPU_TILING_GET(afb->tiling_flags, SWIZZLE_MODE) == 0)

		return 0;



	micro_tile_mode = AMDGPU_TILING_GET(afb->tiling_flags, MICRO_TILE_MODE);

	switch (micro_tile_mode) {

	case 0: /* DISPLAY */

	case 3: /* RENDER */

		return 0;

	default:

		drm_dbg_kms(afb->base.dev,

			    "Micro tile mode %llu not supported for scanout\n",

			    micro_tile_mode);

		return -EINVAL;

	}

}



static void get_block_dimensions(unsigned int block_log2, unsigned int cpp,

				 unsigned int *width, unsigned int *height)

{
@@ -1103,6 +1125,7 @@ int amdgpu_display_framebuffer_init(struct drm_device *dev, 
				    const struct drm_mode_fb_cmd2 *mode_cmd,

				    struct drm_gem_object *obj)

{

	struct amdgpu_device *adev = drm_to_adev(dev);

	int ret, i;



	/*
@@ -1122,6 +1145,14 @@ int amdgpu_display_framebuffer_init(struct drm_device *dev, 
	if (ret)

		return ret;



	if (!dev->mode_config.allow_fb_modifiers) {

		drm_WARN_ONCE(dev, adev->family >= AMDGPU_FAMILY_AI,

			      "GFX9+ requires FB check based on format modifier\n");

		ret = check_tiling_flags_gfx6(rfb);

		if (ret)

			return ret;

	}



	if (dev->mode_config.allow_fb_modifiers &&

	    !(rfb->base.flags & DRM_MODE_FB_MODIFIERS)) {

		ret = convert_tiling_flags_to_modifier(rfb);

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+1 −1
Original line number Diff line number Diff line
@@ -3599,7 +3599,7 @@ static int gfx_v9_0_mqd_init(struct amdgpu_ring *ring) 


	/* set static priority for a queue/ring */

	gfx_v9_0_mqd_set_priority(ring, mqd);

	mqd->cp_hqd_quantum = RREG32(mmCP_HQD_QUANTUM);

	mqd->cp_hqd_quantum = RREG32_SOC15(GC, 0, mmCP_HQD_QUANTUM);



	/* map_queues packet doesn't need activate the queue,

	 * so only kiq need set this field.

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

+2 −1
Original line number Diff line number Diff line
@@ -1098,6 +1098,8 @@ static int gmc_v10_0_hw_fini(void *handle) 
{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	gmc_v10_0_gart_disable(adev);



	if (amdgpu_sriov_vf(adev)) {

		/* full access mode, so don't touch any GMC register */

		DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
@@ -1106,7 +1108,6 @@ static int gmc_v10_0_hw_fini(void *handle) 


	amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);

	amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);

	gmc_v10_0_gart_disable(adev);



	return 0;

}

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+2 −1
Original line number Diff line number Diff line
@@ -1794,6 +1794,8 @@ static int gmc_v9_0_hw_fini(void *handle) 
{

	struct amdgpu_device *adev = (struct amdgpu_device *)handle;



	gmc_v9_0_gart_disable(adev);



	if (amdgpu_sriov_vf(adev)) {

		/* full access mode, so don't touch any GMC register */

		DRM_DEBUG("For SRIOV client, shouldn't do anything.\n");
@@ -1802,7 +1804,6 @@ static int gmc_v9_0_hw_fini(void *handle) 


	amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);

	amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);

	gmc_v9_0_gart_disable(adev);



	return 0;

}

drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

+8 −0
Original line number Diff line number Diff line
@@ -868,6 +868,12 @@ static int sdma_v5_2_start(struct amdgpu_device *adev) 
			msleep(1000);

	}



	/* TODO: check whether can submit a doorbell request to raise

	 * a doorbell fence to exit gfxoff.

	 */

	if (adev->in_s0ix)

		amdgpu_gfx_off_ctrl(adev, false);



	sdma_v5_2_soft_reset(adev);

	/* unhalt the MEs */

	sdma_v5_2_enable(adev, true);
@@ -876,6 +882,8 @@ static int sdma_v5_2_start(struct amdgpu_device *adev) 


	/* start the gfx rings and rlc compute queues */

	r = sdma_v5_2_gfx_resume(adev);

	if (adev->in_s0ix)

		amdgpu_gfx_off_ctrl(adev, true);

	if (r)

		return r;

	r = sdma_v5_2_rlc_resume(adev);