Commit 24e52fc2 authored by Sridevi's avatar Sridevi Committed by Alex Deucher
Browse files

drm/amd/display: DSC Programming Deltas 



[Why]
Programming register delta for DSC sub-block

[How]
Change DSC, resource files for programming register delta.

Acked-by: default avatarStylon Wang <stylon.wang@amd.com>
Signed-off-by: default avatarSridevi <sarvinde@amd.com>
Reviewed-by: default avatarChris Park <Chris.Park@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent aeb3dd7e

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c

+10 −19
Original line number Diff line number Diff line
@@ -30,22 +30,13 @@ 
#include "dsc/dscc_types.h"

#include "dsc/rc_calc.h"



static void dsc_log_pps(struct display_stream_compressor *dsc, struct drm_dsc_config *pps);

static bool dsc_prepare_config(const struct dsc_config *dsc_cfg, struct dsc_reg_values *dsc_reg_vals,

			struct dsc_optc_config *dsc_optc_cfg);

static void dsc_init_reg_values(struct dsc_reg_values *reg_vals);

static void dsc_update_from_dsc_parameters(struct dsc_reg_values *reg_vals, const struct dsc_parameters *dsc_params);

static void dsc_write_to_registers(struct display_stream_compressor *dsc, const struct dsc_reg_values *reg_vals);

static enum dsc_pixel_format dsc_dc_pixel_encoding_to_dsc_pixel_format(enum dc_pixel_encoding dc_pix_enc, bool is_ycbcr422_simple);

static enum dsc_bits_per_comp dsc_dc_color_depth_to_dsc_bits_per_comp(enum dc_color_depth);



/* Object I/F functions */

static void dsc2_get_enc_caps(struct dsc_enc_caps *dsc_enc_caps, int pixel_clock_100Hz);

static void dsc2_read_state(struct display_stream_compressor *dsc, struct dcn_dsc_state *s);

static bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg);

static void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,

		struct dsc_optc_config *dsc_optc_cfg);

static bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, uint8_t *dsc_packed_pps);

static void dsc2_enable(struct display_stream_compressor *dsc, int opp_pipe);

static void dsc2_disable(struct display_stream_compressor *dsc);

static void dsc2_disconnect(struct display_stream_compressor *dsc);
@@ -108,7 +99,7 @@ void dsc2_construct(struct dcn20_dsc *dsc, 
/* This returns the capabilities for a single DSC encoder engine. Number of slices and total throughput

 * can be doubled, tripled etc. by using additional DSC engines.

 */

static void dsc2_get_enc_caps(struct dsc_enc_caps *dsc_enc_caps, int pixel_clock_100Hz)

void dsc2_get_enc_caps(struct dsc_enc_caps *dsc_enc_caps, int pixel_clock_100Hz)

{

	dsc_enc_caps->dsc_version = 0x21; /* v1.2 - DP spec defined it in reverse order and we kept it */
@@ -184,7 +175,7 @@ static bool dsc2_validate_stream(struct display_stream_compressor *dsc, const st 
}





static void dsc_config_log(struct display_stream_compressor *dsc, const struct dsc_config *config)

void dsc_config_log(struct display_stream_compressor *dsc, const struct dsc_config *config)

{

	DC_LOG_DSC("\tnum_slices_h %d", config->dc_dsc_cfg.num_slices_h);

	DC_LOG_DSC("\tnum_slices_v %d", config->dc_dsc_cfg.num_slices_v);
@@ -211,7 +202,7 @@ static void dsc2_set_config(struct display_stream_compressor *dsc, const struct 
}





static bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, uint8_t *dsc_packed_pps)

bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, uint8_t *dsc_packed_pps)

{

	bool is_config_ok;

	struct dsc_reg_values dsc_reg_vals;
@@ -291,7 +282,7 @@ static void dsc2_disconnect(struct display_stream_compressor *dsc) 
}



/* This module's internal functions */

static void dsc_log_pps(struct display_stream_compressor *dsc, struct drm_dsc_config *pps)

void dsc_log_pps(struct display_stream_compressor *dsc, struct drm_dsc_config *pps)

{

	int i;

	int bits_per_pixel = pps->bits_per_pixel;
@@ -345,7 +336,7 @@ static void dsc_log_pps(struct display_stream_compressor *dsc, struct drm_dsc_co 
	}

}



static void dsc_override_rc_params(struct rc_params *rc, const struct dc_dsc_rc_params_override *override)

void dsc_override_rc_params(struct rc_params *rc, const struct dc_dsc_rc_params_override *override)

{

	uint8_t i;
@@ -372,7 +363,7 @@ static void dsc_override_rc_params(struct rc_params *rc, const struct dc_dsc_rc_ 
	rc->flatness_det_thresh = override->flatness_det_thresh;

}



static bool dsc_prepare_config(const struct dsc_config *dsc_cfg, struct dsc_reg_values *dsc_reg_vals,

bool dsc_prepare_config(const struct dsc_config *dsc_cfg, struct dsc_reg_values *dsc_reg_vals,

			struct dsc_optc_config *dsc_optc_cfg)

{

	struct dsc_parameters dsc_params;
@@ -463,7 +454,7 @@ static bool dsc_prepare_config(const struct dsc_config *dsc_cfg, struct dsc_reg_ 
}





static enum dsc_pixel_format dsc_dc_pixel_encoding_to_dsc_pixel_format(enum dc_pixel_encoding dc_pix_enc, bool is_ycbcr422_simple)

enum dsc_pixel_format dsc_dc_pixel_encoding_to_dsc_pixel_format(enum dc_pixel_encoding dc_pix_enc, bool is_ycbcr422_simple)

{

	enum dsc_pixel_format dsc_pix_fmt = DSC_PIXFMT_UNKNOWN;
@@ -495,7 +486,7 @@ static enum dsc_pixel_format dsc_dc_pixel_encoding_to_dsc_pixel_format(enum dc_p 
}





static enum dsc_bits_per_comp dsc_dc_color_depth_to_dsc_bits_per_comp(enum dc_color_depth dc_color_depth)

enum dsc_bits_per_comp dsc_dc_color_depth_to_dsc_bits_per_comp(enum dc_color_depth dc_color_depth)

{

	enum dsc_bits_per_comp bpc = DSC_BPC_UNKNOWN;
@@ -518,7 +509,7 @@ static enum dsc_bits_per_comp dsc_dc_color_depth_to_dsc_bits_per_comp(enum dc_co 
}





static void dsc_init_reg_values(struct dsc_reg_values *reg_vals)

void dsc_init_reg_values(struct dsc_reg_values *reg_vals)

{

	int i;
@@ -574,7 +565,7 @@ static void dsc_init_reg_values(struct dsc_reg_values *reg_vals) 
 * This is required because dscc_compute_dsc_parameters returns a modified PPS, which in turn

 * affects non-PPS register values.

 */

static void dsc_update_from_dsc_parameters(struct dsc_reg_values *reg_vals, const struct dsc_parameters *dsc_params)

void dsc_update_from_dsc_parameters(struct dsc_reg_values *reg_vals, const struct dsc_parameters *dsc_params)

{

	int i;

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h

+28 −0
Original line number Diff line number Diff line
@@ -549,6 +549,27 @@ struct dcn20_dsc { 
	int max_image_width;

};



void dsc_config_log(struct display_stream_compressor *dsc,

		const struct dsc_config *config);



void dsc_log_pps(struct display_stream_compressor *dsc,

		struct drm_dsc_config *pps);



void dsc_override_rc_params(struct rc_params *rc,

		const struct dc_dsc_rc_params_override *override);



bool dsc_prepare_config(const struct dsc_config *dsc_cfg,

		struct dsc_reg_values *dsc_reg_vals,

		struct dsc_optc_config *dsc_optc_cfg);



enum dsc_pixel_format dsc_dc_pixel_encoding_to_dsc_pixel_format(enum dc_pixel_encoding dc_pix_enc,

		bool is_ycbcr422_simple);



enum dsc_bits_per_comp dsc_dc_color_depth_to_dsc_bits_per_comp(enum dc_color_depth dc_color_depth);



void dsc_init_reg_values(struct dsc_reg_values *reg_vals);



void dsc_update_from_dsc_parameters(struct dsc_reg_values *reg_vals, const struct dsc_parameters *dsc_params);



void dsc2_construct(struct dcn20_dsc *dsc,

		struct dc_context *ctx,
@@ -557,5 +578,12 @@ void dsc2_construct(struct dcn20_dsc *dsc, 
		const struct dcn20_dsc_shift *dsc_shift,

		const struct dcn20_dsc_mask *dsc_mask);



void dsc2_get_enc_caps(struct dsc_enc_caps *dsc_enc_caps,

		int pixel_clock_100Hz);



bool dsc2_get_packed_pps(struct display_stream_compressor *dsc,

		const struct dsc_config *dsc_cfg,

		uint8_t *dsc_packed_pps);



#endif