Unverified Commit 24e18b0f authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v5.15-next-soc' of... 

Merge tag 'v5.15-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers

- mt8192: add mutex support
- mmsys:
  add more components
  add routing table for mt8192
  add reset controller support

* tag 'v5.15-next-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  drm/mediatek: mtk_dsi: Reset the dsi0 hardware
  soc: mediatek: mmsys: Add reset controller support
  soc: mediatek: add mtk mutex support for MT8192
  soc: mediatek: mmsys: Add mt8192 mmsys routing table
  soc: mediatek: mmsys: add comp OVL_2L2/POSTMASK/RDMA4

Link: https://lore.kernel.org/r/b1d364d0-f2ae-488b-b3f7-c694049c20d3@gmail.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 16667625 605c8375

drivers/gpu/drm/mediatek/mtk_dsi.c

+4 −1
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <linux/of_platform.h>

#include <linux/phy/phy.h>

#include <linux/platform_device.h>

#include <linux/reset.h>



#include <video/mipi_display.h>

#include <video/videomode.h>
@@ -980,8 +981,10 @@ static int mtk_dsi_bind(struct device *dev, struct device *master, void *data) 
	struct mtk_dsi *dsi = dev_get_drvdata(dev);



	ret = mtk_dsi_encoder_init(drm, dsi);



	if (ret)

		return ret;



	return device_reset_optional(dev);

}



static void mtk_dsi_unbind(struct device *dev, struct device *master,

drivers/soc/mediatek/mt8192-mmsys.h

0 → 100644
+76 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */



#ifndef __SOC_MEDIATEK_MT8192_MMSYS_H

#define __SOC_MEDIATEK_MT8192_MMSYS_H



#define MT8192_MMSYS_OVL_MOUT_EN		0xf04

#define MT8192_DISP_OVL1_2L_MOUT_EN		0xf08

#define MT8192_DISP_OVL0_2L_MOUT_EN		0xf18

#define MT8192_DISP_OVL0_MOUT_EN		0xf1c

#define MT8192_DISP_RDMA0_SEL_IN		0xf2c

#define MT8192_DISP_RDMA0_SOUT_SEL		0xf30

#define MT8192_DISP_CCORR0_SOUT_SEL		0xf34

#define MT8192_DISP_AAL0_SEL_IN			0xf38

#define MT8192_DISP_DITHER0_MOUT_EN		0xf3c

#define MT8192_DISP_DSI0_SEL_IN			0xf40

#define MT8192_DISP_OVL2_2L_MOUT_EN		0xf4c



#define MT8192_DISP_OVL0_GO_BLEND			BIT(0)

#define MT8192_DITHER0_MOUT_IN_DSI0			BIT(0)

#define MT8192_OVL0_MOUT_EN_DISP_RDMA0			BIT(0)

#define MT8192_OVL2_2L_MOUT_EN_RDMA4			BIT(0)

#define MT8192_DISP_OVL0_GO_BG				BIT(1)

#define MT8192_DISP_OVL0_2L_GO_BLEND			BIT(2)

#define MT8192_DISP_OVL0_2L_GO_BG			BIT(3)

#define MT8192_OVL1_2L_MOUT_EN_RDMA1			BIT(4)

#define MT8192_OVL0_MOUT_EN_OVL0_2L			BIT(4)

#define MT8192_RDMA0_SEL_IN_OVL0_2L			0x3

#define MT8192_RDMA0_SOUT_COLOR0			0x1

#define MT8192_CCORR0_SOUT_AAL0				0x1

#define MT8192_AAL0_SEL_IN_CCORR0			0x1

#define MT8192_DSI0_SEL_IN_DITHER0			0x1



static const struct mtk_mmsys_routes mmsys_mt8192_routing_table[] = {

	{

		DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,

		MT8192_DISP_OVL0_2L_MOUT_EN, MT8192_OVL0_MOUT_EN_DISP_RDMA0,

		MT8192_OVL0_MOUT_EN_DISP_RDMA0

	}, {

		DDP_COMPONENT_OVL_2L2, DDP_COMPONENT_RDMA4,

		MT8192_DISP_OVL2_2L_MOUT_EN, MT8192_OVL2_2L_MOUT_EN_RDMA4,

		MT8192_OVL2_2L_MOUT_EN_RDMA4

	}, {

		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,

		MT8192_DISP_DITHER0_MOUT_EN, MT8192_DITHER0_MOUT_IN_DSI0,

		MT8192_DITHER0_MOUT_IN_DSI0

	}, {

		DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,

		MT8192_DISP_RDMA0_SEL_IN, MT8192_RDMA0_SEL_IN_OVL0_2L,

		MT8192_RDMA0_SEL_IN_OVL0_2L

	}, {

		DDP_COMPONENT_CCORR, DDP_COMPONENT_AAL0,

		MT8192_DISP_AAL0_SEL_IN, MT8192_AAL0_SEL_IN_CCORR0,

		MT8192_AAL0_SEL_IN_CCORR0

	}, {

		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,

		MT8192_DISP_DSI0_SEL_IN, MT8192_DSI0_SEL_IN_DITHER0

	}, {

		DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,

		MT8192_DISP_RDMA0_SOUT_SEL, MT8192_RDMA0_SOUT_COLOR0,

		MT8192_RDMA0_SOUT_COLOR0

	}, {

		DDP_COMPONENT_CCORR, DDP_COMPONENT_AAL0,

		MT8192_DISP_CCORR0_SOUT_SEL, MT8192_CCORR0_SOUT_AAL0,

		MT8192_CCORR0_SOUT_AAL0

	}, {

		DDP_COMPONENT_OVL0, DDP_COMPONENT_OVL_2L0,

		MT8192_MMSYS_OVL_MOUT_EN, MT8192_DISP_OVL0_GO_BG,

		MT8192_DISP_OVL0_GO_BG

	}, {

		DDP_COMPONENT_OVL_2L0, DDP_COMPONENT_RDMA0,

		MT8192_MMSYS_OVL_MOUT_EN, MT8192_DISP_OVL0_2L_GO_BLEND,

		MT8192_DISP_OVL0_2L_GO_BLEND

	}

};



#endif /* __SOC_MEDIATEK_MT8192_MMSYS_H */

drivers/soc/mediatek/mtk-mmsys.c

+79 −0
Original line number Diff line number Diff line
@@ -4,15 +4,18 @@ 
 * Author: James Liao <jamesjj.liao@mediatek.com>

 */



#include <linux/delay.h>

#include <linux/device.h>

#include <linux/io.h>

#include <linux/of_device.h>

#include <linux/platform_device.h>

#include <linux/reset-controller.h>

#include <linux/soc/mediatek/mtk-mmsys.h>



#include "mtk-mmsys.h"

#include "mt8167-mmsys.h"

#include "mt8183-mmsys.h"

#include "mt8192-mmsys.h"

#include "mt8365-mmsys.h"



static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
@@ -53,6 +56,12 @@ static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = { 
	.num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),

};



static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {

	.clk_driver = "clk-mt8192-mm",

	.routes = mmsys_mt8192_routing_table,

	.num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table),

};



static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {

	.clk_driver = "clk-mt8365-mm",

	.routes = mt8365_mmsys_routing_table,
@@ -62,6 +71,8 @@ static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = { 
struct mtk_mmsys {

	void __iomem *regs;

	const struct mtk_mmsys_driver_data *data;

	spinlock_t lock; /* protects mmsys_sw_rst_b reg */

	struct reset_controller_dev rcdev;

};



void mtk_mmsys_ddp_connect(struct device *dev,
@@ -101,6 +112,58 @@ void mtk_mmsys_ddp_disconnect(struct device *dev, 
}

EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect);



static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id,

				  bool assert)

{

	struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);

	unsigned long flags;

	u32 reg;



	spin_lock_irqsave(&mmsys->lock, flags);



	reg = readl_relaxed(mmsys->regs + MMSYS_SW0_RST_B);



	if (assert)

		reg &= ~BIT(id);

	else

		reg |= BIT(id);



	writel_relaxed(reg, mmsys->regs + MMSYS_SW0_RST_B);



	spin_unlock_irqrestore(&mmsys->lock, flags);



	return 0;

}



static int mtk_mmsys_reset_assert(struct reset_controller_dev *rcdev, unsigned long id)

{

	return mtk_mmsys_reset_update(rcdev, id, true);

}



static int mtk_mmsys_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id)

{

	return mtk_mmsys_reset_update(rcdev, id, false);

}



static int mtk_mmsys_reset(struct reset_controller_dev *rcdev, unsigned long id)

{

	int ret;



	ret = mtk_mmsys_reset_assert(rcdev, id);

	if (ret)

		return ret;



	usleep_range(1000, 1100);



	return mtk_mmsys_reset_deassert(rcdev, id);

}



static const struct reset_control_ops mtk_mmsys_reset_ops = {

	.assert = mtk_mmsys_reset_assert,

	.deassert = mtk_mmsys_reset_deassert,

	.reset = mtk_mmsys_reset,

};



static int mtk_mmsys_probe(struct platform_device *pdev)

{

	struct device *dev = &pdev->dev;
@@ -120,6 +183,18 @@ static int mtk_mmsys_probe(struct platform_device *pdev) 
		return ret;

	}



	spin_lock_init(&mmsys->lock);



	mmsys->rcdev.owner = THIS_MODULE;

	mmsys->rcdev.nr_resets = 32;

	mmsys->rcdev.ops = &mtk_mmsys_reset_ops;

	mmsys->rcdev.of_node = pdev->dev.of_node;

	ret = devm_reset_controller_register(&pdev->dev, &mmsys->rcdev);

	if (ret) {

		dev_err(&pdev->dev, "Couldn't register mmsys reset controller: %d\n", ret);

		return ret;

	}



	mmsys->data = of_device_get_match_data(&pdev->dev);

	platform_set_drvdata(pdev, mmsys);
@@ -167,6 +242,10 @@ static const struct of_device_id of_match_mtk_mmsys[] = { 
		.compatible = "mediatek,mt8183-mmsys",

		.data = &mt8183_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt8192-mmsys",

		.data = &mt8192_mmsys_driver_data,

	},

	{

		.compatible = "mediatek,mt8365-mmsys",

		.data = &mt8365_mmsys_driver_data,

drivers/soc/mediatek/mtk-mmsys.h

+2 −0
Original line number Diff line number Diff line
@@ -78,6 +78,8 @@ 
#define DSI_SEL_IN_RDMA				0x1

#define DSI_SEL_IN_MASK				0x1



#define MMSYS_SW0_RST_B				0x140



struct mtk_mmsys_routes {

	u32 from_comp;

	u32 to_comp;

drivers/soc/mediatek/mtk-mutex.c

+35 −0
Original line number Diff line number Diff line
@@ -39,6 +39,18 @@ 
#define MT8167_MUTEX_MOD_DISP_DITHER		15

#define MT8167_MUTEX_MOD_DISP_UFOE		16



#define MT8192_MUTEX_MOD_DISP_OVL0		0

#define MT8192_MUTEX_MOD_DISP_OVL0_2L		1

#define MT8192_MUTEX_MOD_DISP_RDMA0		2

#define MT8192_MUTEX_MOD_DISP_COLOR0		4

#define MT8192_MUTEX_MOD_DISP_CCORR0		5

#define MT8192_MUTEX_MOD_DISP_AAL0		6

#define MT8192_MUTEX_MOD_DISP_GAMMA0		7

#define MT8192_MUTEX_MOD_DISP_POSTMASK0		8

#define MT8192_MUTEX_MOD_DISP_DITHER0		9

#define MT8192_MUTEX_MOD_DISP_OVL2_2L		16

#define MT8192_MUTEX_MOD_DISP_RDMA4		17



#define MT8183_MUTEX_MOD_DISP_RDMA0		0

#define MT8183_MUTEX_MOD_DISP_RDMA1		1

#define MT8183_MUTEX_MOD_DISP_OVL0		9
@@ -214,6 +226,20 @@ static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = { 
	[DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,

};



static const unsigned int mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] = {

	[DDP_COMPONENT_AAL0] = MT8192_MUTEX_MOD_DISP_AAL0,

	[DDP_COMPONENT_CCORR] = MT8192_MUTEX_MOD_DISP_CCORR0,

	[DDP_COMPONENT_COLOR0] = MT8192_MUTEX_MOD_DISP_COLOR0,

	[DDP_COMPONENT_DITHER] = MT8192_MUTEX_MOD_DISP_DITHER0,

	[DDP_COMPONENT_GAMMA] = MT8192_MUTEX_MOD_DISP_GAMMA0,

	[DDP_COMPONENT_POSTMASK0] = MT8192_MUTEX_MOD_DISP_POSTMASK0,

	[DDP_COMPONENT_OVL0] = MT8192_MUTEX_MOD_DISP_OVL0,

	[DDP_COMPONENT_OVL_2L0] = MT8192_MUTEX_MOD_DISP_OVL0_2L,

	[DDP_COMPONENT_OVL_2L2] = MT8192_MUTEX_MOD_DISP_OVL2_2L,

	[DDP_COMPONENT_RDMA0] = MT8192_MUTEX_MOD_DISP_RDMA0,

	[DDP_COMPONENT_RDMA4] = MT8192_MUTEX_MOD_DISP_RDMA4,

};



static const unsigned int mt2712_mutex_sof[MUTEX_SOF_DSI3 + 1] = {

	[MUTEX_SOF_SINGLE_MODE] = MUTEX_SOF_SINGLE_MODE,

	[MUTEX_SOF_DSI0] = MUTEX_SOF_DSI0,
@@ -275,6 +301,13 @@ static const struct mtk_mutex_data mt8183_mutex_driver_data = { 
	.no_clk = true,

};



static const struct mtk_mutex_data mt8192_mutex_driver_data = {

	.mutex_mod = mt8192_mutex_mod,

	.mutex_sof = mt8183_mutex_sof,

	.mutex_mod_reg = MT8183_MUTEX0_MOD0,

	.mutex_sof_reg = MT8183_MUTEX0_SOF0,

};



struct mtk_mutex *mtk_mutex_get(struct device *dev)

{

	struct mtk_mutex_ctx *mtx = dev_get_drvdata(dev);
@@ -507,6 +540,8 @@ static const struct of_device_id mutex_driver_dt_match[] = { 
	  .data = &mt8173_mutex_driver_data},

	{ .compatible = "mediatek,mt8183-disp-mutex",

	  .data = &mt8183_mutex_driver_data},

	{ .compatible = "mediatek,mt8192-disp-mutex",

	  .data = &mt8192_mutex_driver_data},

	{},

};

MODULE_DEVICE_TABLE(of, mutex_driver_dt_match);