Commit 2481e820 authored by Anirudh Venkataramanan's avatar Anirudh Venkataramanan Committed by Tony Nguyen
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ice: Add support for 100G KR2/CR2/SR2 link reporting



Commit 2736d94f ("ethtool: Added support for 50Gbps per lane link modes")
in v5.1 added (among other things) support for 100G CR2/KR2/SR2 link modes.
Advertise these link modes if the firmware reports the corresponding PHY types.

Signed-off-by: default avatarAnirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: default avatarPrzemek Kitszel <przemyslaw.kitszel@intel.com>
Tested-by: Sunitha Mekala <sunithax.d.mekala@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent 6a8d013e
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+32 −9
Original line number Diff line number Diff line
@@ -1950,8 +1950,7 @@ ice_phy_type_to_ethtool(struct net_device *netdev,
			   ICE_PHY_TYPE_LOW_100G_CAUI4 |
			   ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC |
			   ICE_PHY_TYPE_LOW_100G_AUI4 |
			   ICE_PHY_TYPE_LOW_100GBASE_CR_PAM4 |
			   ICE_PHY_TYPE_LOW_100GBASE_CP2;
			   ICE_PHY_TYPE_LOW_100GBASE_CR_PAM4;
	phy_type_mask_hi = ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC |
			   ICE_PHY_TYPE_HIGH_100G_CAUI2 |
			   ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC |
@@ -1964,15 +1963,27 @@ ice_phy_type_to_ethtool(struct net_device *netdev,
						100000baseCR4_Full);
	}

	phy_type_mask_lo = ICE_PHY_TYPE_LOW_100GBASE_SR4 |
			   ICE_PHY_TYPE_LOW_100GBASE_SR2;
	if (phy_types_low & phy_type_mask_lo) {
	if (phy_types_low & ICE_PHY_TYPE_LOW_100GBASE_CP2) {
		ethtool_link_ksettings_add_link_mode(ks, supported,
						     100000baseCR2_Full);
		ice_ethtool_advertise_link_mode(ICE_AQ_LINK_SPEED_100GB,
						100000baseCR2_Full);
	}

	if (phy_types_low & ICE_PHY_TYPE_LOW_100GBASE_SR4) {
		ethtool_link_ksettings_add_link_mode(ks, supported,
						     100000baseSR4_Full);
		ice_ethtool_advertise_link_mode(ICE_AQ_LINK_SPEED_100GB,
						100000baseSR4_Full);
	}

	if (phy_types_low & ICE_PHY_TYPE_LOW_100GBASE_SR2) {
		ethtool_link_ksettings_add_link_mode(ks, supported,
						     100000baseSR2_Full);
		ice_ethtool_advertise_link_mode(ICE_AQ_LINK_SPEED_100GB,
						100000baseSR2_Full);
	}

	phy_type_mask_lo = ICE_PHY_TYPE_LOW_100GBASE_LR4 |
			   ICE_PHY_TYPE_LOW_100GBASE_DR;
	if (phy_types_low & phy_type_mask_lo) {
@@ -1984,14 +1995,20 @@ ice_phy_type_to_ethtool(struct net_device *netdev,

	phy_type_mask_lo = ICE_PHY_TYPE_LOW_100GBASE_KR4 |
			   ICE_PHY_TYPE_LOW_100GBASE_KR_PAM4;
	phy_type_mask_hi = ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4;
	if (phy_types_low & phy_type_mask_lo ||
	    phy_types_high & phy_type_mask_hi) {
	if (phy_types_low & phy_type_mask_lo) {
		ethtool_link_ksettings_add_link_mode(ks, supported,
						     100000baseKR4_Full);
		ice_ethtool_advertise_link_mode(ICE_AQ_LINK_SPEED_100GB,
						100000baseKR4_Full);
	}

	if (phy_types_high & ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4) {
		ethtool_link_ksettings_add_link_mode(ks, supported,
						     100000baseKR2_Full);
		ice_ethtool_advertise_link_mode(ICE_AQ_LINK_SPEED_100GB,
						100000baseKR2_Full);
	}

}

#define TEST_SET_BITS_TIMEOUT	50
@@ -2299,7 +2316,13 @@ ice_ksettings_find_adv_link_speed(const struct ethtool_link_ksettings *ks)
	    ethtool_link_ksettings_test_link_mode(ks, advertising,
						  100000baseLR4_ER4_Full) ||
	    ethtool_link_ksettings_test_link_mode(ks, advertising,
						  100000baseKR4_Full))
						  100000baseKR4_Full) ||
	    ethtool_link_ksettings_test_link_mode(ks, advertising,
						  100000baseCR2_Full) ||
	    ethtool_link_ksettings_test_link_mode(ks, advertising,
						  100000baseSR2_Full) ||
	    ethtool_link_ksettings_test_link_mode(ks, advertising,
						  100000baseKR2_Full))
		adv_link_speed |= ICE_AQ_LINK_SPEED_100GB;

	return adv_link_speed;