Commit 247c8a73 authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Remove pointless extra namespace from dkl/snps buf trans structs 



The struct itself already has sufficient namespace. No need to
duplicate it in the members.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211006204937.30774-2-ville.syrjala@linux.intel.com


Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent abffa715

drivers/gpu/drm/i915/display/intel_ddi.c

+3 −3
Original line number Diff line number Diff line
@@ -1285,9 +1285,9 @@ static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder, 
	dpcnt_mask = (DKL_TX_PRESHOOT_COEFF_MASK |

		      DKL_TX_DE_EMPAHSIS_COEFF_MASK |

		      DKL_TX_VSWING_CONTROL_MASK);

	dpcnt_val = DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.dkl_vswing_control);

	dpcnt_val |= DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.dkl_de_emphasis_control);

	dpcnt_val |= DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.dkl_preshoot_control);

	dpcnt_val = DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing);

	dpcnt_val |= DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.de_emphasis);

	dpcnt_val |= DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.preshoot);



	for (ln = 0; ln < 2; ln++) {

		intel_de_write(dev_priv, HIP_INDEX_REG(tc_port),

drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h

+6 −6
Original line number Diff line number Diff line
@@ -40,15 +40,15 @@ struct icl_mg_phy_ddi_buf_trans { 
};



struct tgl_dkl_phy_ddi_buf_trans {

	u32 dkl_vswing_control;

	u32 dkl_preshoot_control;

	u32 dkl_de_emphasis_control;

	u32 vswing;

	u32 preshoot;

	u32 de_emphasis;

};



struct dg2_snps_phy_buf_trans {

	u8 snps_vswing;

	u8 snps_pre_cursor;

	u8 snps_post_cursor;

	u8 vswing;

	u8 pre_cursor;

	u8 post_cursor;

};



union intel_ddi_buf_trans_entry {

drivers/gpu/drm/i915/display/intel_snps_phy.c

+3 −3
Original line number Diff line number Diff line
@@ -68,9 +68,9 @@ void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder, 
	for (ln = 0; ln < 4; ln++) {

		u32 val = 0;



		val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_MAIN, trans->entries[level].snps.snps_vswing);

		val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_PRE, trans->entries[level].snps.snps_pre_cursor);

		val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_POST, trans->entries[level].snps.snps_post_cursor);

		val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_MAIN, trans->entries[level].snps.vswing);

		val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_PRE, trans->entries[level].snps.pre_cursor);

		val |= REG_FIELD_PREP(SNPS_PHY_TX_EQ_POST, trans->entries[level].snps.post_cursor);



		intel_de_write(dev_priv, SNPS_PHY_TX_EQ(ln, phy), val);

	}