Commit 244dba4c authored by Lucas De Marchi's avatar Lucas De Marchi
Browse files

drm/i915: replace random CNL comments 



Cleanup remaining cases that we find CNL in the codebase.

Signed-off-by: default avatarLucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210728215946.1573015-22-lucas.demarchi@intel.com
parent a2db1945

drivers/gpu/drm/i915/display/intel_bios.c

+1 −1
Original line number Diff line number Diff line
@@ -1998,7 +1998,7 @@ static void parse_ddi_port(struct drm_i915_private *i915, 
			    "Port %c VBT HDMI boost level: %d\n",

			    port_name(port), hdmi_boost_level);



	/* DP max link rate for CNL+ */

	/* DP max link rate for GLK+ */

	if (i915->vbt.version >= 216) {

		if (i915->vbt.version >= 230)

			info->dp_max_link_rate = parse_bdb_230_dp_max_link_rate(child->dp_max_link_rate);

drivers/gpu/drm/i915/display/intel_display.c

+3 −3
Original line number Diff line number Diff line
@@ -3575,7 +3575,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state, 


	crtc->active = true;



	/* Display WA #1180: WaDisableScalarClockGating: glk, cnl */

	/* Display WA #1180: WaDisableScalarClockGating: glk */

	psl_clkgate_wa = DISPLAY_VER(dev_priv) == 10 &&

		new_crtc_state->pch_pfit.enabled;

	if (psl_clkgate_wa)
@@ -9870,7 +9870,7 @@ static int intel_atomic_check_async(struct intel_atomic_state *state) 


		/*

		 * FIXME: This check is kept generic for all platforms.

		 * Need to verify this for all gen9 and gen10 platforms to enable

		 * Need to verify this for all gen9 platforms to enable

		 * this selectively if required.

		 */

		switch (new_plane_state->hw.fb->modifier) {
@@ -13257,7 +13257,7 @@ get_encoder_power_domains(struct drm_i915_private *dev_priv) 
static void intel_early_display_was(struct drm_i915_private *dev_priv)

{

	/*

	 * Display WA #1185 WaDisableDARBFClkGating:cnl,glk,icl,ehl,tgl

	 * Display WA #1185 WaDisableDARBFClkGating:glk,icl,ehl,tgl

	 * Also known as Wa_14010480278.

	 */

	if (IS_DISPLAY_VER(dev_priv, 10, 12))

drivers/gpu/drm/i915/display/intel_dp_aux.c

+0 −1
Original line number Diff line number Diff line
@@ -158,7 +158,6 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp, 
	/*

	 * Max timeout values:

	 * SKL-GLK: 1.6ms

	 * CNL: 3.2ms

	 * ICL+: 4ms

	 */

	ret = DP_AUX_CH_CTL_SEND_BUSY |

drivers/gpu/drm/i915/display/intel_dpll_mgr.h

+1 −2
Original line number Diff line number Diff line
@@ -204,9 +204,8 @@ struct intel_dpll_hw_state { 
	/* HDMI only, 0 when used for DP */

	u32 cfgcr1, cfgcr2;



	/* cnl */

	/* icl */

	u32 cfgcr0;

	/* CNL also uses cfgcr1 */



	/* bxt */

	u32 ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, pcsdw12;

drivers/gpu/drm/i915/display/intel_gmbus.c

+2 −2
Original line number Diff line number Diff line
@@ -600,7 +600,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num, 
	int i = 0, inc, try = 0;

	int ret = 0;



	/* Display WA #0868: skl,bxt,kbl,cfl,glk,cnl */

	/* Display WA #0868: skl,bxt,kbl,cfl,glk */

	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))

		bxt_gmbus_clock_gating(dev_priv, false);

	else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_CNP(dev_priv))
@@ -713,7 +713,7 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num, 
	ret = -EAGAIN;



out:

	/* Display WA #0868: skl,bxt,kbl,cfl,glk,cnl */

	/* Display WA #0868: skl,bxt,kbl,cfl,glk */

	if (IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv))

		bxt_gmbus_clock_gating(dev_priv, true);

	else if (HAS_PCH_SPT(dev_priv) || HAS_PCH_CNP(dev_priv))