Commit 244839d0 authored by Potin Lai's avatar Potin Lai Committed by Joel Stanley
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ARM: dts: aspeed: bletchley: add sample averaging for ADM1278 



set number of sample averaging to 128 for both PWR_AVG and VI_AVG

Signed-off-by: default avatarPotin Lai <potin.lai@quantatw.com>
Reviewed-by: default avatarPatrick Williams <patrick@stwcx.xyz>
Link: https://lore.kernel.org/r/20220418094827.6185-1-potin.lai@quantatw.com


Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent 8c9e3743

arch/arm/boot/dts/aspeed-bmc-facebook-bletchley.dts

+2 −0
Original line number Diff line number Diff line
@@ -821,6 +821,8 @@ 
		compatible = "adi,adm1278";

		reg = <0x11>;

		shunt-resistor-micro-ohms = <300>;

		adi,volt-curr-sample-average = <128>;

		adi,power-sample-average = <128>;

	};



	tmp421@4c {