Commit 242bab2d authored by Max Krummenacher's avatar Max Krummenacher Committed by Shawn Guo
Browse files

ARM: dts: imx6ull: improve can templates 



Add the pinmuxing and a inactive node for flexcan1 on SODIMM 55/63
and move the inactive flexcan nodes to imx6ull-colibri-eval-v3.dtsi
where they belong.

Note that this commit does not enable flexcan functionality, but rather
eases the effort needed to do so.

Signed-off-by: default avatarMax Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: default avatarPhilippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: default avatarOleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 92cede44

arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ 
&iomuxc {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3

		&pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6>;

		&pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6 &pinctrl_gpio7>;

};



&iomuxc_snvs {

arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 
&iomuxc {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3

		&pinctrl_gpio4 &pinctrl_gpio5>;

		&pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio7>;



};

arch/arm/boot/dts/imx6ull-colibri.dtsi

+26 −2
Original line number Diff line number Diff line
@@ -54,6 +54,18 @@ 
	vref-supply = <&reg_module_3v3_avdd>;

};



&can1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_flexcan1>;

	status = "disabled";

};



&can2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_flexcan2>;

	status = "disabled";

};



/* Colibri SPI */

&ecspi1 {

	cs-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>;
@@ -256,6 +268,13 @@ 
		>;

	};



	pinctrl_flexcan1: flexcan1-grp {

		fsl,pins = <

			MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX	0x1b020

			MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX	0x1b020

		>;

	};



	pinctrl_flexcan2: flexcan2-grp {

		fsl,pins = <

			MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX	0x1b020
@@ -271,8 +290,6 @@ 


	pinctrl_gpio1: gpio1-grp {

		fsl,pins = <

			MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00	0x74 /* SODIMM 55 */

			MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01	0x74 /* SODIMM 63 */

			MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25	0X14 /* SODIMM 77 */

			MX6UL_PAD_JTAG_TCK__GPIO1_IO14		0x14 /* SODIMM 99 */

			MX6UL_PAD_NAND_CE1_B__GPIO4_IO14	0x14 /* SODIMM 133 */
@@ -325,6 +342,13 @@ 
		>;

	};



	pinctrl_gpio7: gpio7-grp { /* CAN1 */

		fsl,pins = <

			MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00	0x74 /* SODIMM 55 */

			MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01	0x74 /* SODIMM 63 */

		>;

	};



	pinctrl_gpmi_nand: gpmi-nand-grp {

		fsl,pins = <

			MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00	0x100a9