Commit 23fa99b2 authored by Philippe Schenker's avatar Philippe Schenker Committed by Shawn Guo
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arm64: dts: freescale: imx8-ss-lsio: add support for lsio_pwm0-3 



Add support for lsio_pwm0-3.

Signed-off-by: default avatarPhilippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: default avatarMax Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent fe15c26e

arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi

+48 −0
Original line number Diff line number Diff line
@@ -28,6 +28,54 @@ lsio_subsys: bus@5d000000 { 
		clock-output-names = "lsio_bus_clk";

	};



	lsio_pwm0: pwm@5d000000 {

		compatible = "fsl,imx27-pwm";

		reg = <0x5d000000 0x10000>;

		clock-names = "ipg", "per";

		clocks = <&pwm0_lpcg 4>,

			 <&pwm0_lpcg 1>;

		assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>;

		assigned-clock-rates = <24000000>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	lsio_pwm1: pwm@5d010000 {

		compatible = "fsl,imx27-pwm";

		reg = <0x5d010000 0x10000>;

		clock-names = "ipg", "per";

		clocks = <&pwm1_lpcg 4>,

			 <&pwm1_lpcg 1>;

		assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>;

		assigned-clock-rates = <24000000>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	lsio_pwm2: pwm@5d020000 {

		compatible = "fsl,imx27-pwm";

		reg = <0x5d020000 0x10000>;

		clock-names = "ipg", "per";

		clocks = <&pwm2_lpcg 4>,

			 <&pwm2_lpcg 1>;

		assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>;

		assigned-clock-rates = <24000000>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	lsio_pwm3: pwm@5d030000 {

		compatible = "fsl,imx27-pwm";

		reg = <0x5d030000 0x10000>;

		clock-names = "ipg", "per";

		clocks = <&pwm3_lpcg 4>,

			 <&pwm3_lpcg 1>;

		assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>;

		assigned-clock-rates = <24000000>;

		#pwm-cells = <2>;

		status = "disabled";

	};



	lsio_gpio0: gpio@5d080000 {

		reg = <0x5d080000 0x10000>;

		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;