Unverified Commit 23e32a6e authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!624 Intel SPR fast rep string operations support 

Merge Pull Request from: @x56Jason 
 
This PR is to enable support for Intel new fast rep string operation performance enhancement.

Starting with Golden Cove microarchitecture (SPR and Alderlake), Intel CPU support some rep string
operation performance enhancement, which include the following features:
- fast zero-length MOVSB
- fast short STOSB
- fast short CMPSB, SCASB

More information see section 3.8 of "Intel® 64 and IA-32 Architectures Optimization Reference Manual".

## Intel-Kernel Issue
#I6YPV0

## Test
Launch VM and run cpuid, we can see following cpu features are true:
```
fast zero-length MOVSB                   = true
fast short STOSB                         = true
fast short CMPSB, SCASB                  = true
```
Without this patchset, these features are false.

## Known Issue
N/A

## Default Config Change
N/A
 
 
Link:https://gitee.com/openeuler/kernel/pulls/624

 

Reviewed-by: default avatarAichun Shi <aichun.shi@intel.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents e4f33a9c cc3a6f72

arch/x86/include/asm/cpufeatures.h

+3 −0
Original line number Diff line number Diff line
@@ -327,6 +327,9 @@ 
/* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */

#define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */

#define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */

#define X86_FEATURE_FZRM		(12*32+10) /* "" Fast zero-length REP MOVSB */

#define X86_FEATURE_FSRS		(12*32+11) /* "" Fast short REP STOSB */

#define X86_FEATURE_FSRC		(12*32+12) /* "" Fast short REP {CMPSB,SCASB} */



/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */

#define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */

arch/x86/kvm/cpuid.c

+2 −1
Original line number Diff line number Diff line
@@ -496,7 +496,8 @@ void kvm_set_cpu_caps(void) 
		kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);



	kvm_cpu_cap_mask(CPUID_7_1_EAX,

		F(AVX_VNNI) | F(AVX512_BF16)

		F(AVX_VNNI) | F(AVX512_BF16) |

		F(FZRM) | F(FSRS) | F(FSRC)

	);



	kvm_cpu_cap_mask(CPUID_D_1_EAX,