Commit 23a890d4 authored by Luo Jie's avatar Luo Jie Committed by David S. Miller
Browse files

net: mdio: Add the reset function for IPQ MDIO driver 



1. configure the MDIO clock source frequency.
2. the LDO resource is needed to configure the ethernet LDO available
for CMN_PLL.

Signed-off-by: default avatarLuo Jie <luoj@codeaurora.org>
Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e4637f62

drivers/net/mdio/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -169,6 +169,7 @@ config MDIO_OCTEON 
config MDIO_IPQ4019

	tristate "Qualcomm IPQ4019 MDIO interface support"

	depends on HAS_IOMEM && OF_MDIO

	depends on COMMON_CLK

	help

	  This driver supports the MDIO interface found in Qualcomm

	  IPQ40xx series Soc-s.

drivers/net/mdio/mdio-ipq4019.c

+43 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
#include <linux/of_mdio.h>

#include <linux/phy.h>

#include <linux/platform_device.h>

#include <linux/clk.h>



#define MDIO_MODE_REG				0x40

#define MDIO_ADDR_REG				0x44
@@ -31,8 +32,15 @@ 
#define IPQ4019_MDIO_TIMEOUT	10000

#define IPQ4019_MDIO_SLEEP		10



/* MDIO clock source frequency is fixed to 100M */

#define IPQ_MDIO_CLK_RATE	100000000



#define IPQ_PHY_SET_DELAY_US	100000



struct ipq4019_mdio_data {

	void __iomem	*membase;

	void __iomem *eth_ldo_rdy;

	struct clk *mdio_clk;

};



static int ipq4019_mdio_wait_busy(struct mii_bus *bus)
@@ -171,10 +179,35 @@ static int ipq4019_mdio_write(struct mii_bus *bus, int mii_id, int regnum, 
	return 0;

}



static int ipq_mdio_reset(struct mii_bus *bus)

{

	struct ipq4019_mdio_data *priv = bus->priv;

	u32 val;

	int ret;



	/* To indicate CMN_PLL that ethernet_ldo has been ready if platform resource 1

	 * is specified in the device tree.

	 */

	if (priv->eth_ldo_rdy) {

		val = readl(priv->eth_ldo_rdy);

		val |= BIT(0);

		writel(val, priv->eth_ldo_rdy);

		fsleep(IPQ_PHY_SET_DELAY_US);

	}



	/* Configure MDIO clock source frequency if clock is specified in the device tree */

	ret = clk_set_rate(priv->mdio_clk, IPQ_MDIO_CLK_RATE);

	if (ret)

		return ret;



	return clk_prepare_enable(priv->mdio_clk);

}



static int ipq4019_mdio_probe(struct platform_device *pdev)

{

	struct ipq4019_mdio_data *priv;

	struct mii_bus *bus;

	struct resource *res;

	int ret;



	bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*priv));
@@ -187,9 +220,19 @@ static int ipq4019_mdio_probe(struct platform_device *pdev) 
	if (IS_ERR(priv->membase))

		return PTR_ERR(priv->membase);



	priv->mdio_clk = devm_clk_get_optional(&pdev->dev, "gcc_mdio_ahb_clk");

	if (IS_ERR(priv->mdio_clk))

		return PTR_ERR(priv->mdio_clk);



	/* The platform resource is provided on the chipset IPQ5018 */

	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);

	if (res)

		priv->eth_ldo_rdy = devm_ioremap_resource(&pdev->dev, res);



	bus->name = "ipq4019_mdio";

	bus->read = ipq4019_mdio_read;

	bus->write = ipq4019_mdio_write;

	bus->reset = ipq_mdio_reset;

	bus->parent = &pdev->dev;

	snprintf(bus->id, MII_BUS_ID_SIZE, "%s%d", pdev->name, pdev->id);