Unverified Commit 237ca69c authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!1151 [sync] PR-1150: EDAC/i10nm: Add Intel Emerald Rapids server support 

Merge Pull Request from: @openeuler-sync-bot 
 

Origin pull request: 
https://gitee.com/openeuler/kernel/pulls/1150 
 
EDAC/i10nm: Add Intel Emerald Rapids server support

The Emerald Rapids CPU model uses similar memory controller registers
as Sapphire Rapids server. Add Emerald Rapids CPU model number ID for
EDAC support.

bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I7DZRN

[Testing]
dmesg - check i10nm_edac load 
 
 
Link:https://gitee.com/openeuler/kernel/pulls/1151

 

Reviewed-by: default avatarJason Zeng <jason.zeng@intel.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
parents e0cbadc5 f58579b9

drivers/edac/i10nm_base.c

+1 −0
Original line number Diff line number Diff line
@@ -674,6 +674,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = { 
	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_X,		X86_STEPPINGS(0x4, 0xf), &i10nm_cfg1),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ICELAKE_D,		X86_STEPPINGS(0x0, 0xf), &i10nm_cfg1),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(SAPPHIRERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),

	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),

	{}

};

MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);