Commit 22fb0e28 authored Aug 16, 2022 by Maxime Ripard Committed by Stephen Boyd Sep 15, 2022

clk: Constify clk_has_parent()



clk_has_parent() doesn't modify the clocks being passed, so let's make
it const.

Suggested-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20220816112530.1837489-21-maxime@cerno.tech


Tested-by: Linux Kernel Functional Testing <lkft@linaro.org>
Tested-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

parent 1234a2c4

drivers/clk/clk.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -2593,7 +2593,7 @@ void clk_hw_reparent(struct clk_hw hw, struct clk_hw new_parent)
		*
		* Returns true if @parent is a possible parent for @clk, false otherwise.
		*/
		bool clk_has_parent(struct clk clk, struct clk parent)
		bool clk_has_parent(const struct clk clk, const struct clk parent)
		{
		/* NULL clocks should be nops, so return success if either is NULL. */
		if (!clk \|\| !parent)

include/linux/clk.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -799,7 +799,7 @@ int clk_set_rate_exclusive(struct clk *clk, unsigned long rate);
		*
		* Returns true if @parent is a possible parent for @clk, false otherwise.
		*/
		bool clk_has_parent(struct clk clk, struct clk parent);
		bool clk_has_parent(const struct clk clk, const struct clk parent);

		/**
		* clk_set_rate_range - set a rate range for a clock source