Commit 2225acc3 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'linux-watchdog-5.17-rc1' of git://www.linux-watchdog.org/linux-watchdog 

Pull watchdog updates from Wim Van Sebroeck:

 - New device support:
     - Watchdog Timer driver for RZ/G2L
     - Realtek Otto watchdog timer
     - Apple SoC watchdog driver
     - Fintek F81966

 - Remove BCM63XX_WDT after support for this SoC was added to
   BCM7038_WDT

 - Improvements of the BCM7038_WDT and s3c2410_wdt code

 - Several other fixes and improvements

* tag 'linux-watchdog-5.17-rc1' of git://www.linux-watchdog.org/linux-watchdog: (38 commits)
  watchdog: msc313e: Check if the WDT was running at boot
  watchdog: Add Apple SoC watchdog driver
  dt-bindings: watchdog: Add SM6350 and SM8250 compatible
  watchdog: s3c2410: Fix getting the optional clock
  watchdog: s3c2410: Use platform_get_irq() to get the interrupt
  dt-bindings: watchdog: atmel: Add missing 'interrupts' property
  watchdog: mtk_wdt: use platform_get_irq_optional
  watchdog: Add Watchdog Timer driver for RZ/G2L
  dt-bindings: watchdog: renesas,wdt: Add support for RZ/G2L
  watchdog: da9063: Add hard dependency on I2C
  watchdog: Add Realtek Otto watchdog timer
  dt-bindings: watchdog: Realtek Otto WDT binding
  watchdog: s3c2410: Add Exynos850 support
  watchdog: da9063: use atomic safe i2c transfer in reset handler
  watchdog: davinci: Use div64_ul instead of do_div
  watchdog: Remove BCM63XX_WDT
  MIPS: BCM63XX: Provide platform data to watchdog device
  watchdog: bcm7038_wdt: Add platform device id for bcm63xx-wdt
  watchdog: Allow building BCM7038_WDT for BCM63XX
  watchdog: bcm7038_wdt: Support platform data configuration
  ...
parents b70b878c ffd264bd

Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.txt

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BCM7038 Watchdog timer



Required properties:



- compatible : should be "brcm,bcm7038-wdt"

- reg : Specifies base physical address and size of the registers.



Optional properties:



- clocks: The clock running the watchdog. If no clock is found the

	  driver will default to 27000000 Hz.



Example:



watchdog@f040a7e8 {

	compatible = "brcm,bcm7038-wdt";

	clocks = <&upg_fixed>;

	reg = <0xf040a7e8 0x16>;

};

Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/watchdog/brcm,bcm7038-wdt.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: BCM63xx and BCM7038 watchdog timer



allOf:

  - $ref: "watchdog.yaml#"



maintainers:

  - Florian Fainelli <f.fainelli@gmail.com>

  - Justin Chen <justinpopo6@gmail.com>

  - Rafał Miłecki <rafal@milecki.pl>



properties:

  compatible:

    enum:

      - brcm,bcm6345-wdt

      - brcm,bcm7038-wdt



  reg:

    maxItems: 1



  clocks:

    maxItems: 1

    description: >

      The clock running the watchdog. If no clock is found the driver will

      default to 27000000 Hz.



unevaluatedProperties: false



required:

  - reg



examples:

  - |

    watchdog@f040a7e8 {

      compatible = "brcm,bcm7038-wdt";

      reg = <0xf040a7e8 0x16>;

      clocks = <&upg_fixed>;

    };

Documentation/devicetree/bindings/watchdog/fsl-imx7ulp-wdt.yaml

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@@ -14,8 +14,11 @@ allOf: 


properties:

  compatible:

    enum:

      - fsl,imx7ulp-wdt

    oneOf:

      - const: fsl,imx7ulp-wdt

      - items:

          - const: fsl,imx8ulp-wdt

          - const: fsl,imx7ulp-wdt



  reg:

    maxItems: 1

Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml

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@@ -20,7 +20,9 @@ properties: 
      - qcom,apss-wdt-sc7280

      - qcom,apss-wdt-sdm845

      - qcom,apss-wdt-sdx55

      - qcom,apss-wdt-sm6350

      - qcom,apss-wdt-sm8150

      - qcom,apss-wdt-sm8250

      - qcom,kpss-timer

      - qcom,kpss-wdt

      - qcom,kpss-wdt-apq8064

Documentation/devicetree/bindings/watchdog/realtek,otto-wdt.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/watchdog/realtek,otto-wdt.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Realtek Otto watchdog timer



maintainers:

  - Sander Vanheule <sander@svanheule.net>



description: |

  The timer has two timeout phases. Both phases have a maximum duration of 32

  prescaled clock ticks, which is ca. 43s with a bus clock of 200MHz. The

  minimum duration of each phase is one tick. Each phase can trigger an

  interrupt, although the phase 2 interrupt will occur with the system reset.

  - Phase 1: During this phase, the WDT can be pinged to reset the timeout.

  - Phase 2: Starts after phase 1 has timed out, and only serves to give the

    system some time to clean up, or notify others that it's going to reset.

    During this phase, pinging the WDT has no effect, and a reset is

    unavoidable, unless the WDT is disabled.



allOf:

  - $ref: watchdog.yaml#



properties:

  compatible:

    enum:

      - realtek,rtl8380-wdt

      - realtek,rtl8390-wdt

      - realtek,rtl9300-wdt



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  interrupts:

    items:

      - description: interrupt specifier for pretimeout

      - description: interrupt specifier for timeout



  interrupt-names:

    items:

      - const: phase1

      - const: phase2



  realtek,reset-mode:

    $ref: /schemas/types.yaml#/definitions/string

    description: |

      Specify how the system is reset after a timeout. Defaults to "cpu" if

      left unspecified.

    oneOf:

      - description: Reset the entire chip

        const: soc

      - description: |

          Reset the CPU and IPsec engine, but leave other peripherals untouched

        const: cpu

      - description: |

          Reset the execution pointer, but don't actually reset any hardware

        const: software



required:

  - compatible

  - reg

  - clocks

  - interrupts



unevaluatedProperties: false



dependencies:

  interrupts: [ interrupt-names ]



examples:

  - |

    watchdog: watchdog@3150 {

        compatible = "realtek,rtl8380-wdt";

        reg = <0x3150 0xc>;



        realtek,reset-mode = "soc";



        clocks = <&lxbus_clock>;

        timeout-sec = <20>;



        interrupt-parent = <&rtlintc>;

        interrupt-names = "phase1", "phase2";

        interrupts = <19>, <18>;

    };



...