Commit 22168675 authored by Marco Felsch's avatar Marco Felsch Committed by Sakari Ailus
Browse files

phy: dphy: add support to calculate the timing based on hs_clk_rate 



For MIPI-CSI sender use-case it is common to specify the allowed
link-frequencies which should be used for the MIPI link and is
half the hs-clock rate.

This commit adds a helper to calculate the D-PHY timing based on the
hs-clock rate so we don't need to calculate the timings within the
driver.

Signed-off-by: default avatarMarco Felsch <m.felsch@pengutronix.de>
Acked-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarSakari Ailus <sakari.ailus@linux.intel.com>
parent 7afa5db0

drivers/phy/phy-core-mipi-dphy.c

+18 −4
Original line number Diff line number Diff line
@@ -20,16 +20,18 @@ 
static int phy_mipi_dphy_calc_config(unsigned long pixel_clock,

				     unsigned int bpp,

				     unsigned int lanes,

				     unsigned long long hs_clk_rate,

				     struct phy_configure_opts_mipi_dphy *cfg)

{

	unsigned long long hs_clk_rate;

	unsigned long long ui;



	if (!cfg)

		return -EINVAL;



	if (!hs_clk_rate) {

		hs_clk_rate = pixel_clock * bpp;

		do_div(hs_clk_rate, lanes);

	}



	ui = ALIGN(PSEC_PER_SEC, hs_clk_rate);

	do_div(ui, hs_clk_rate);
@@ -81,11 +83,23 @@ int phy_mipi_dphy_get_default_config(unsigned long pixel_clock, 
				     unsigned int lanes,

				     struct phy_configure_opts_mipi_dphy *cfg)

{

	return phy_mipi_dphy_calc_config(pixel_clock, bpp, lanes, cfg);

	return phy_mipi_dphy_calc_config(pixel_clock, bpp, lanes, 0, cfg);



}

EXPORT_SYMBOL(phy_mipi_dphy_get_default_config);



int phy_mipi_dphy_get_default_config_for_hsclk(unsigned long long hs_clk_rate,

					       unsigned int lanes,

					       struct phy_configure_opts_mipi_dphy *cfg)

{

	if (!hs_clk_rate)

		return -EINVAL;



	return phy_mipi_dphy_calc_config(0, 0, lanes, hs_clk_rate, cfg);



}

EXPORT_SYMBOL(phy_mipi_dphy_get_default_config_for_hsclk);



/*

 * Validate D-PHY configuration according to MIPI D-PHY specification

 * (v1.2, Section Section 6.9 "Global Operation Timing Parameters").

include/linux/phy/phy-mipi-dphy.h

+3 −0
Original line number Diff line number Diff line
@@ -279,6 +279,9 @@ int phy_mipi_dphy_get_default_config(unsigned long pixel_clock, 
				     unsigned int bpp,

				     unsigned int lanes,

				     struct phy_configure_opts_mipi_dphy *cfg);

int phy_mipi_dphy_get_default_config_for_hsclk(unsigned long long hs_clk_rate,

					       unsigned int lanes,

					       struct phy_configure_opts_mipi_dphy *cfg);

int phy_mipi_dphy_config_validate(struct phy_configure_opts_mipi_dphy *cfg);



#endif /* __PHY_MIPI_DPHY_H_ */