Commit 2215cb3b authored by Marco Felsch's avatar Marco Felsch Committed by Marek Vasut
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drm: lcdif: change burst size to 256B 



If a axi bus master with a higher priority do a lot of memory access
FIFO underruns can be inspected. Increase the burst size to 256B to
avoid such underruns and to improve the memory access efficiency.

Fixes: 9db35bb3 ("drm: lcdif: Add support for i.MX8MP LCDIF variant")
Signed-off-by: default avatarMarco Felsch <m.felsch@pengutronix.de>
Reviewed-by: default avatarMarek Vasut <marex@denx.de>
Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20221101164615.778299-1-m.felsch@pengutronix.de
parent da7ffb96

drivers/gpu/drm/mxsfb/lcdif_kms.c

+12 −2
Original line number Diff line number Diff line
@@ -314,8 +314,18 @@ static void lcdif_set_mode(struct lcdif_drm_private *lcdif, u32 bus_flags) 
	       CTRLDESCL0_1_WIDTH(m->hdisplay),

	       lcdif->base + LCDC_V8_CTRLDESCL0_1);



	writel(CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]),

	       lcdif->base + LCDC_V8_CTRLDESCL0_3);

	/*

	 * Undocumented P_SIZE and T_SIZE register but those written in the

	 * downstream kernel those registers control the AXI burst size. As of

	 * now there are two known values:

	 *  1 - 128Byte

	 *  2 - 256Byte

	 * Downstream set it to 256B burst size to improve the memory

	 * efficiency so set it here too.

	 */

	ctrl = CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) |

	       CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]);

	writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3);

}



static void lcdif_enable_controller(struct lcdif_drm_private *lcdif)

drivers/gpu/drm/mxsfb/lcdif_regs.h

+4 −0
Original line number Diff line number Diff line
@@ -190,6 +190,10 @@ 
#define CTRLDESCL0_1_WIDTH(n)		((n) & 0xffff)

#define CTRLDESCL0_1_WIDTH_MASK		GENMASK(15, 0)



#define CTRLDESCL0_3_P_SIZE(n)		(((n) << 20) & CTRLDESCL0_3_P_SIZE_MASK)

#define CTRLDESCL0_3_P_SIZE_MASK	GENMASK(22, 20)

#define CTRLDESCL0_3_T_SIZE(n)		(((n) << 16) & CTRLDESCL0_3_T_SIZE_MASK)

#define CTRLDESCL0_3_T_SIZE_MASK	GENMASK(17, 16)

#define CTRLDESCL0_3_PITCH(n)		((n) & 0xffff)

#define CTRLDESCL0_3_PITCH_MASK		GENMASK(15, 0)