Commit 21d3cdd0 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Krzysztof Kozlowski
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dt-bindings: memory: tegra20: emc: Correct registers range in example 



There is superfluous zero in the registers base address and registers
size should be twice bigger.

Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarThierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20201104164923.21238-5-digetx@gmail.com


Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 65abc8ef

Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-emc.txt

+1 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ Example: 
		#address-cells = < 1 >;

		#size-cells = < 0 >;

		compatible = "nvidia,tegra20-emc";

		reg = <0x7000f4000 0x200>;

		reg = <0x7000f400 0x400>;

		interrupts = <0 78 0x04>;

		clocks = <&tegra_car TEGRA20_CLK_EMC>;

	}