Commit 21cdc87f authored by Paolo Abeni's avatar Paolo Abeni
Browse files

Merge branch 'add-emac3-support-for-sa8540p-ride' 

Andrew Halaney says:

====================
Add EMAC3 support for sa8540p-ride

This is a forward port / upstream refactor of code delivered
downstream by Qualcomm over at [0] to enable the DWMAC5 based
implementation called EMAC3 on the sa8540p-ride dev board.

From what I can tell with the board schematic in hand,
as well as the code delivered, the main changes needed are:

    1. A new address space layout for dwmac5/EMAC3 MTL/DMA regs
    2. A new programming sequence required for the EMAC3 based platforms

This series makes the changes above as well as other housekeeping items
such as converting dt-bindings to yaml, etc.

As requested[1], it has been split up by compilation deps / maintainer tree.
I will post a link to the associated devicetree changes that together
with this series get the hardware functioning.

Patches 1-3 are clean ups of the currently supported dt-bindings and
IMO could be picked up as is independent of the rest of the series to
improve the current codebase. They've all been reviewed in prior
versions of the series.

Patches 5-7 are also clean ups of the driver and are worth picking up
independently as well. They don't all have explicit reviews but should
be good to go (trivial changes on non-reviewed bits).

The rest of the patches have new changes, lack review, or are specificly
being made to support the new hardware, so they should wait until the
series as a whole is deemed ready to go by the community.

====================

Link: https://lore.kernel.org/r/20230411200409.455355-1-ahalaney@redhat.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parents f032d8a9 b6837619

Documentation/devicetree/bindings/net/qcom,ethqos.txt

deleted100644 → 0
+0 −66
Original line number Diff line number Diff line 
Qualcomm Ethernet ETHQOS device



This documents dwmmac based ethernet device which supports Gigabit

ethernet for version v2.3.0 onwards.



This device has following properties:



Required properties:



- compatible: Should be one of:

		"qcom,qcs404-ethqos"

		"qcom,sm8150-ethqos"



- reg: Address and length of the register set for the device



- reg-names: Should contain register names "stmmaceth", "rgmii"



- clocks: Should contain phandle to clocks



- clock-names: Should contain clock names "stmmaceth", "pclk",

		"ptp_ref", "rgmii"



- interrupts: Should contain phandle to interrupts



- interrupt-names: Should contain interrupt names "macirq", "eth_lpi"



Rest of the properties are defined in stmmac.txt file in same directory





Example:



ethernet: ethernet@7a80000 {

	compatible = "qcom,qcs404-ethqos";

	reg = <0x07a80000 0x10000>,

		<0x07a96000 0x100>;

	reg-names = "stmmaceth", "rgmii";

	clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";

	clocks = <&gcc GCC_ETH_AXI_CLK>,

		<&gcc GCC_ETH_SLAVE_AHB_CLK>,

		<&gcc GCC_ETH_PTP_CLK>,

		<&gcc GCC_ETH_RGMII_CLK>;

	interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,

			<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

	interrupt-names = "macirq", "eth_lpi";

	snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;

	snps,reset-active-low;



	snps,txpbl = <8>;

	snps,rxpbl = <2>;

	snps,aal;

	snps,tso;



	phy-handle = <&phy1>;

	phy-mode = "rgmii";



	mdio {

		#address-cells = <0x1>;

		#size-cells = <0x0>;

		compatible = "snps,dwmac-mdio";

		phy1: phy@4 {

			device_type = "ethernet-phy";

			reg = <0x4>;

		};

	};



};

Documentation/devicetree/bindings/net/qcom,ethqos.yaml

0 → 100644
+111 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/net/qcom,ethqos.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Ethernet ETHQOS device



maintainers:

  - Bhupesh Sharma <bhupesh.sharma@linaro.org>



description:

  dwmmac based Qualcomm ethernet devices which support Gigabit

  ethernet (version v2.3.0 and onwards).



allOf:

  - $ref: snps,dwmac.yaml#



properties:

  compatible:

    enum:

      - qcom,qcs404-ethqos

      - qcom,sc8280xp-ethqos

      - qcom,sm8150-ethqos



  reg:

    maxItems: 2



  reg-names:

    items:

      - const: stmmaceth

      - const: rgmii



  interrupts:

    items:

      - description: Combined signal for various interrupt events

      - description: The interrupt that occurs when Rx exits the LPI state



  interrupt-names:

    items:

      - const: macirq

      - const: eth_lpi



  clocks:

    maxItems: 4



  clock-names:

    items:

      - const: stmmaceth

      - const: pclk

      - const: ptp_ref

      - const: rgmii



  iommus:

    maxItems: 1



required:

  - compatible

  - clocks

  - clock-names

  - reg-names



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/clock/qcom,gcc-qcs404.h>

    #include <dt-bindings/gpio/gpio.h>



    ethernet: ethernet@7a80000 {

      compatible = "qcom,qcs404-ethqos";

      reg = <0x07a80000 0x10000>,

            <0x07a96000 0x100>;

      reg-names = "stmmaceth", "rgmii";

      clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";

      clocks = <&gcc GCC_ETH_AXI_CLK>,

               <&gcc GCC_ETH_SLAVE_AHB_CLK>,

               <&gcc GCC_ETH_PTP_CLK>,

               <&gcc GCC_ETH_RGMII_CLK>;

      interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,

                   <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;

      interrupt-names = "macirq", "eth_lpi";



      rx-fifo-depth = <4096>;

      tx-fifo-depth = <4096>;



      snps,tso;

      snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>;

      snps,reset-active-low;

      snps,reset-delays-us = <0 10000 10000>;



      pinctrl-names = "default";

      pinctrl-0 = <&ethernet_defaults>;



      phy-handle = <&phy1>;

      phy-mode = "rgmii";

      mdio {

        #address-cells = <0x1>;

        #size-cells = <0x0>;



        compatible = "snps,dwmac-mdio";

        phy1: phy@4 {

          compatible = "ethernet-phy-ieee802.3-c22";

          device_type = "ethernet-phy";

          reg = <0x4>;



          #phy-cells = <0>;

        };

      };

    };

Documentation/devicetree/bindings/net/snps,dwmac.yaml

+8 −1
Original line number Diff line number Diff line
@@ -65,6 +65,9 @@ properties: 
        - ingenic,x2000-mac

        - loongson,ls2k-dwmac

        - loongson,ls7a-dwmac

        - qcom,qcs404-ethqos

        - qcom,sc8280xp-ethqos

        - qcom,sm8150-ethqos

        - renesas,r9a06g032-gmac

        - renesas,rzn1-gmac

        - rockchip,px30-gmac
@@ -105,7 +108,7 @@ properties: 
    minItems: 1

    items:

      - const: macirq

      - const: eth_wake_irq

      - enum: [eth_wake_irq, eth_lpi]

      - const: eth_lpi



  clocks:
@@ -572,6 +575,7 @@ allOf: 
              - ingenic,x1600-mac

              - ingenic,x1830-mac

              - ingenic,x2000-mac

              - qcom,sc8280xp-ethqos

              - snps,dwmac-3.50a

              - snps,dwmac-4.10a

              - snps,dwmac-4.20a
@@ -625,6 +629,9 @@ allOf: 
              - ingenic,x1600-mac

              - ingenic,x1830-mac

              - ingenic,x2000-mac

              - qcom,qcs404-ethqos

              - qcom,sc8280xp-ethqos

              - qcom,sm8150-ethqos

              - snps,dwmac-4.00

              - snps,dwmac-4.10a

              - snps,dwmac-4.20a

MAINTAINERS

+1 −1
Original line number Diff line number Diff line
@@ -17304,7 +17304,7 @@ M: Vinod Koul <vkoul@kernel.org> 
R:	Bhupesh Sharma <bhupesh.sharma@linaro.org>

L:	netdev@vger.kernel.org

S:	Maintained

F:	Documentation/devicetree/bindings/net/qcom,ethqos.txt

F:	Documentation/devicetree/bindings/net/qcom,ethqos.yaml

F:	drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c









QUALCOMM FASTRPC DRIVER

























drivers/net/ethernet/stmicro/stmmac/chain_mode.c



+4
−6






























Original line number
Diff line number
Diff line







@@ -14,9 +14,9 @@

















#include "stmmac.h"



















static int jumbo_frm(void *p, struct sk_buff *skb, int csum)









static int jumbo_frm(struct stmmac_tx_queue *tx_q, struct sk_buff *skb,









		     int csum)









{









	struct stmmac_tx_queue *tx_q = (struct stmmac_tx_queue *)p;









	unsigned int nopaged_len = skb_headlen(skb);









	struct stmmac_priv *priv = tx_q->priv_data;









	unsigned int entry = tx_q->cur_tx;








@@ -125,9 +125,8 @@ static void init_dma_chain(void *des, dma_addr_t phy_addr,







	}









}



















static void refill_desc3(void *priv_ptr, struct dma_desc *p)









static void refill_desc3(struct stmmac_rx_queue *rx_q, struct dma_desc *p)









{









	struct stmmac_rx_queue *rx_q = (struct stmmac_rx_queue *)priv_ptr;









	struct stmmac_priv *priv = rx_q->priv_data;



















	if (priv->hwts_rx_en && !priv->extend_desc)








@@ -141,9 +140,8 @@ static void refill_desc3(void *priv_ptr, struct dma_desc *p)







				      sizeof(struct dma_desc)));









}



















static void clean_desc3(void *priv_ptr, struct dma_desc *p)









static void clean_desc3(struct stmmac_tx_queue *tx_q, struct dma_desc *p)









{









	struct stmmac_tx_queue *tx_q = (struct stmmac_tx_queue *)priv_ptr;









	struct stmmac_priv *priv = tx_q->priv_data;









	unsigned int entry = tx_q->dirty_tx;